Battelle Memorial Institute

Patent Trials and Appeals Board

Apr 2, 2021

2019004783 (P.T.A.B. Apr. 2, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
14/038,069 09/26/2013 Thomas W. Edgar 16333-E CIP (BA4-0575) 2929
48293 7590 04/02/2021
Wells St. John P.S.
601 W. Main Avenue
Suite 600
Spokane, WA 99201-0613
EXAMINER
MARCELO, MELVIN C
ART UNIT PAPER NUMBER
2463
NOTIFICATION DATE DELIVERY MODE
04/02/2021 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
docketing@wellsip.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte THOMAS W. EDGAR, SEAN J. ZABRISKIE, and
ERIC Y. CHOI
Appeal 2019-004783
Application 14/038,069
Technology Center 2400
Before ST. JOHN COURTENAY III, CATHERINE SHIANG, and
SCOTT E. BAIN, Administrative Patent Judges.

BAIN, Administrative Patent Judge.
DECISION ON APPEAL
Appellant1 appeals under 35 U.S.C. § 134(a) from the Examiner’s
decision to reject claims 1–38. We have jurisdiction under 35 U.S.C. § 6(b).
We REVERSE.

1 We use the word “Appellant” to refer to “applicant” as defined in
37 C.F.R. § 1.42(a). Appellant identifies the real party in interest as Battelle
Memorial Institute. Appeal Br. 3.
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Application 14/038,069

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BACKGROUND
The Claimed Invention
The invention relates to “tapping serial communications between two
or more devices and transforming the serial data into a format appropriate
for routable networks.” Spec. ¶ 4. The Specification explains that there is a
“need for systems and methods of sending serial traffic onto a routable
network, where it could be centrally monitored, without adding
computational overhead or new points of failure to critical infrastructure
networks.” Id. ¶ 3.
Claims 1 and 13 are independent. Claim 1 is illustrative of the
invention and the subject matter in dispute, and is reproduced below:
1. An apparatus to passively tap bi-directional serial
communications having serial protocol frames that are
unspecified to the apparatus, the apparatus characterized by:
Passive, serial-communications, interception circuitry
comprising at least two serial communications pass-throughs
and a processor, each serial communications pass-through
connected to the processor and interfaced to a serial
communication cable through which the bi-directional serial
communications are transmitted between at least two devices;
The processor executing programming to determine
serial protocol frames according to characteristics of the serial
communications, to wrap the serial protocol frames in a
routable protocol, thereby forming a plurality of routable
packets, and to transmit the routable packets to one or more
routable addresses through an interface connecting the
processor to a routable network.

Appeal Br. 28 (Claims App.).
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The Rejection on Appeal
Claims 1–38 stand rejected under pre-AIA 35 U.S.C. § 112, first
paragraph as failing to comply with the enablement requirement. Final Act.
3–4.
DISCUSSION
We have reviewed the Examiner’s rejection in light of Appellant’s
arguments presented in this appeal. Arguments that Appellant could have
made but did not make in the Briefs are deemed to be waived. See 37 C.F.R.
§ 41.37(c)(1)(iv). For the reasons discussed below, Appellant has persuaded
us of error.
The Examiner concludes that the claims fail to satisfy the enablement
requirement.2 Appeal Br. 5–27; Final Act. 3–4. Specifically, the Examiner
finds it is “not clear [in Appellant’s Specification] how the intercepted serial
communication signals that are tapped from a serial bus with an unspecified
protocol are formed into data blocks (Figures 6–11).” Final Act. 3. The
Examiner further finds “it is not clear whether the intercepted serial data is
already in the form of data blocks or whether the Arm9 [disclosed
microcontroller] itself processes the intercepted bus signals and forms data
blocks.” Id. Referring to the “Tyco Electronics publication ‘RS485 &
Modbus Protocol Guide’” (“Tyco”), which Appellant discloses as “examples
of serial communication protocols DNP3, Modbus and RS232/485,” the
Examiner finds that it is still “not clear how the individual bits on a tapped

2 Appellant argues the claims as a group, and the Examiner treats the claims
as a group in the rejection. Accordingly, we analyze the claims as a group,
with claim 1 as representative of the group. 37 C.F.R. § 41.37(c)(1)(iv).
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serial bus is formed into a data block when its protocol is unspecified.”
Final Ans. 4.
In addition, the Examiner cites “Yan et al. publication ‘A General
Module for the Detecting and Decoding of Serial Buses’” (“Yan”) and finds
that Yan “teaches that on an asynchronous RS232 bus the bit signal may not
have a leading or trailing edge.” Ans. 4 (citing Yan at 109, Fig. 4). Thus,
the Examiner reasons, Yan would “require a clock of known frequency
. . . to register the real data from the data line,” and “different decoders are
needed to just capture the data bit on the serial bus.” Id.3 Thus, the
Examiner finds, “it is not even clear that bit values from a wireless tap on a
serial communication line such as the disclosed RS232 can be determined
directly from the tap itself.” Id.
Enablement is a question of law involving underlying factual
inquiries. See Genentech, Inc. v. Novo Nordisk A/S, 108 F.3d 1361, 1365
(Fed. Cir. 1997). “[T]o be enabling, the specification of a patent
[application] must teach those skilled in the art how to make and use the full
scope of the claimed invention without ‘undue experimentation.’”
Genentech, Inc. v. Novo Nordisk, A/S, 108 F.3d 1361, 1365 (Fed. Cir. 1997)
(quoting In re Wright, 999 F.2d 1557, 1561 (Fed. Cir. 1993)) (emphasis
added). Determining the need for “undue experimentation” is not “a single,

3 Notwithstanding the Examiner’s discussion of Tyco and Yan in support of
the enablement rejection, and Appellant’s acknowledgement of
“conventional” and “well-known” elements in the claimed invention (Reply
Br. 3), there is no art rejection before us. In the event of further prosecution,
we invite the Examiner to consider whether the claimed invention would
have been obvious in view of the references discussed herein, admitted prior
art, or other references.
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simple factual determination, but rather is a conclusion reached by weighing
many” factors. In re Wands, 858 F.2d 731, 737 (Fed. Cir. 1988). Those
factors (the Wands factors) include:
(1) the quantity of experimentation necessary, (2) the amount of
direction or guidance presented, (3) the presence or absence of
working examples, (4) the nature of the invention, (5) the state
of the prior art, (6) the relative skill of those in the art, (7) the
predictability or unpredictability of the art, and (8) the breadth of
the claims.
Id. (citing In re Forman, 230 USPQ 546, 547 (BPAI 1986)).
On the record before us, Appellant persuades us that the Examiner’s
enablement rejection is in error. As evidence, Appellant submits a
declaration from one of the named co-inventors, Eric Y. Choi (“Choi
Declaration”), in which Mr. Choi describes in significant detail the
knowledge of one of ordinary skill at the time of the invention, regarding
programming an Arm9 microcontroller to identify serial bits, and
configuring the microcontroller to receive and process serial
communications as recited in Appellant’s claims. See, e.g., Choi Decl. ¶¶ 7–
8. The Examiner does not find specific error in the Choi Declaration, nor
does the Examiner provide any contrary evidence.
In addition, the Examiner’s basis for the enablement rejection appears
to rely, at least in part, on interpreting claim 1 as reciting “intercept[ion]” of
bits. See supra. We agree with Appellant’s argument, however, that despite
the recitation of “interception circuitry” in claim 1, the claim is “devoid of
any limitations with respect to interception of bits from the serial
communications or the formation of data blocks therefrom.” Reply Br. 3.
Rather, claim 1 more broadly recites an apparatus programmed to
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“determine serial protocol frames.”4 Relying on the uncontroverted Choi
Declaration, Appellant persuasively argues
the identification of bits [in the claimed invention] from the
serial communications and formation of data blocks therefrom
is performed by a conventional universal synchronous and
asynchronous receiver-transmitter (USART). In particular, as
set forth in paragraphs 6-8 of the Choi declaration, the Arm9™
microcontroller shown in Fig. 5 includes a USART which is a
serial interface device that can be programmed to communicate
serial data asynchronously or synchronously and that it is well-
known to program the USART to receive and process serial
communications within a specific implementation of use. A
skilled electrical engineer understands that once programmed,
the USART is configured to identify serial bits from RS-232
communications which are referred to in paragraph 8 of the
specification and form data blocks therefrom.

Reply Br. 3–4 (emphasis added).
For the foregoing reasons, Appellant persuades us of error regarding
the enablement rejection. We, therefore, do not sustain the enablement
rejection of claims 1–38.
CONCLUSION
For the foregoing reasons, we affirm the Examiner’s decision
rejecting claims 1–38.
DECISION SUMMARY
In summary:
Claim(s)
Rejected
35 U.S.C.
§
Reference(s)/Basis Affirmed Reversed
1–38 112, ¶ 1 Enablement 1–38

4 See supra, n.3.
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REVERSED