Advanced Micro Devices, Inc.

Patent Trials and Appeals Board

Apr 14, 2021

2019006440 (P.T.A.B. Apr. 14, 2021)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
15/359,829 11/23/2016 Paul Moyer 1458-160228 1028
109712 7590 04/14/2021
Advanced Micro Devices, Inc.
c/o Davidson Sheehan LLP
6836 Austin Center Blvd.
Suite 320
Austin, TX 78731
EXAMINER
DUDEK JR, EDWARD J
ART UNIT PAPER NUMBER
2136
NOTIFICATION DATE DELIVERY MODE
04/14/2021 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
AMD@DS-patent.com
docketing@ds-patent.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
_____________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
_____________

Ex parte PAUL MOYER 1
_____________

Appeal 2019-006440
Application 15/359,829
Technology Center 2100
______________

Before ST. JOHN COURTENAY, III, JOHNNY A. KUMAR, and
JOHN A. EVANS, Administrative Patent Judges.

EVANS, Administrative Patent Judge.

DECISION ON APPEAL
STATEMENT OF THE CASE

This is a decision on appeal under 35 U.S.C. § 134(a) from the
Examiner’s Final Rejection of Claims 1 and 3–20. Final Act. 1; Appeal Br.
11–14 (Claims App’x.). Claim 2 is canceled. We have jurisdiction over the
pending claims under 35 U.S.C. § 6(b).
We REVERSE.

1 We use the word “Appellant” to refer to “applicant” as defined in
37 C.F.R. § 1.42. The Appeal Brief identifies Advanced Micro Devices,
Inc., as the real party in interest. Appeal Br. 1.
Appeal 2019-006440
Application 15/359,829

2

INVENTION
The invention is directed to a method of operating a cache based
application of software hint policies. See Abstract. Claims 1, 10, and 15 are
independent. Illustrative Claim 1, is reproduced below with some
formatting added.
1. A method, comprising:
in response to receiving a first request for data associated
with a first software hint at a first region of a cache, following
the first software hint based on a first hint policy associated
with the first region of the cache, the first software hint
representing an explicit indicator in a set of instructions;
in response to receiving a second request for data
associated with a second software hint at a second region of the
cache, ignoring the second software hint based on a second hint
policy associated with the second region of the cache;
measuring a first performance characteristic for the first
region of the cache and a second performance characteristic for
the second region of the cache;
selecting one of the first hint policy and the second hint
policy as a third hint policy for a third region of the cache based
on the first performance characteristic and the second
performance characteristic; and
in response to receiving a third request for data
associated with a third software hint at the third region of the
cache, selectively following or ignoring the third software hint
based on the third hint policy selected for the third region of the
cache.

Appeal 2019-006440
Application 15/359,829

3

PRIOR ART
Name2 Reference Date
Arimilli US 6,721,856 B1 Apr. 13, 2004
Yochai US 9,798,665 B1 Oct. 24, 2017
Archambault US 2007/0088915 A1 Apr. 19, 2007
Cain, III US 2015/0286571 A1 Oct. 8, 2015
Anantaraman US 2015/0378919 A1 Dec. 31, 2015

REJECTIONS3 AT ISSUE4
1. Claims 1, 3, 5, 7, 8, 10, 11, 13, 15, 16, and 18–20 stand rejected under
35 U.S.C. § 103 as obvious over Cain and Anantaraman. Final Act.
3–12.
2. Claims 4, 12, and 17 stand rejected under 35 U.S.C. § 103 as obvious
over Cain, Anantaraman, and Archambault. Final Act. 12–15.
3. Claims 6 and 14 stand rejected under 35 U.S.C. § 103 as obvious over
Cain, Anantaraman, and Arimilli. Final Act. 15–18.
4. Claim 9 stands rejected under 35 U.S.C. § 103 as obvious over Cain,
Anantaraman, and Yochai. Final Act. 18–19.

2 All citations herein to the references are by reference to the first named
inventor/author only.
3 The present application, filed on November 23, 2016 which is or after
March 16, 2013, is being examined under the first inventor to file provisions
of the AIA. Final Act. 2.
4 Throughout this Decision, we refer to the Appeal Brief (“Appeal Br.”) filed
April 16, 2019, the Reply Brief (“Reply Br.”) filed August 28, 2019, the
Final Office Action (“Final Act.”) mailed November 23, 2018, the
Examiner’s Answer mailed July 3, 2019, and the Specification (“Spec.”)
filed November 23, 2016.
Appeal 2019-006440
Application 15/359,829

4

ANALYSIS
We have reviewed the rejections of Claims 1 and 3–20 in light of
Appellant’s arguments that the Examiner erred. We review the appealed
rejections for error based upon the issues identified by Appellant and in light
of the arguments and evidence produced thereon. Ex parte Frye, 94
USPQ2d 1072, 1075 (BPAI 2010) (precedential), cited with approval in In
re Jung, 637 F.3d 1356, 1365 (Fed. Cir. 2011) (“[I]t has long been the
Board’s practice to require an applicant to identify the alleged error in the
examiner’s rejections.”). We have considered in this decision only those
arguments Appellants actually raised in the Briefs. Any other arguments
which Appellants could have made but chose not to make in the Briefs are
deemed to have been forfeited. See 37 C.F.R. § 41.37(c)(1)(iv). After
considering the evidence presented in this Appeal and each of Appellant’s
arguments, we are persuaded that Appellant identifies reversible error.
CLAIMS 1, 3, 5, 7, 8, 10, 11, 13, 15, 16, AND 18–20:
OBVIOUSNESS OVER CAIN AND ANANTARAMAN.
Appellant argues the independent claims together as a group. Appeal
Br. 7 (“Claims 10 and 15 recite features similar to those discussed above
with respect to claim 1: Accordingly, for similar reasons to those set forth
above with respect to claim 1, the cited references fail to disclose the
features of claims 10 and 15.”).
Independent Claim 1 recites, inter alia, “in response to receiving a
first request for data associated with a first software hint at a first region of a
cache, following the first software hint based on a first hint policy associated
Appeal 2019-006440
Application 15/359,829

5

with the first region of the cache, the first software hint representing an
explicit indicator in a set of instructions.”
The Examiner finds Cain fails to disclose the claimed first, second,
and third software hints and either following or ignoring the hints based on
the cache policy. Final Act. 5. However, the Examiner finds Anantaraman
discloses the claimed first, second, and third software hints associated with
data requests. Id. (citing Anantaraman ¶ 16) (“pre-fetch hint information”).
The Examiner finds the first software hint is taught as a pre-fetch request
vector generated by software running on the cache controller). Id. (citing
Anantaraman ¶¶ 29, 45).
Appellant contends the pre-fetch hints taught by Anantaraman are
hardware hints generated by a controller of a lower-level cache and that one
skilled in the art would not understand a pre-fetch hint generated by a cache
to be a software hint. Appeal Br. 6; Reply Br. 2.
The Examiner finds Anantaraman discloses that the pre-fetch hints are
generated by the cache controller. Final Act. 3 (citing Anantaraman ¶¶ 29,
43, 56). The Examiner finds the pre-fetch hint “is part of the instructions
sent by the cache controller to the memory controller.” Id. (emphasis
added). The Examiner finds Anantaraman discloses the request engine that
operates the cache controller can be implemented with software logic, thus,
any commands that are sent from the cache controller can be considered
software instructions. Ans. 21 (citing Anantaraman ¶ 45).

Appeal 2019-006440
Application 15/359,829

6

Claim Construction
We begin our analysis with claim construction of the claim term
“software hint.” As clarified by the Federal Circuit:
The correct inquiry in giving a claim term its broadest reasonable
interpretation [(BRI)] in light of the specification is not whether
the specification proscribes or precludes some broad reading of
the claim term adopted by the examiner. And it is not simply an
interpretation that is not inconsistent with the specification. It is
an interpretation that corresponds with what and how the
inventor describes his invention in the specification, i.e., an
interpretation that is “consistent with the specification.”

In re Smith International, Inc. 871 F.3d 1375, 1382–1383 (Fed. Cir.
2017) (quoting Morris, 127 F.3d at 1054)).

Turning to the supporting descriptions found in the Specification,
Appellant discloses:
In an attempt to improve memory access efficiency, a compiler
can insert one or more software hints into a set of instructions . .
. .
Spec. ¶ 1 (emphasis added).
[A] software hint may be inserted by a compiler based a
prediction of processor behavior for a particular processor
configuration . . . .
Spec. ¶ 14 (emphasis added).
To facilitate more efficient caching of data, a compiler may
insert hints in executing software 103 indicating when and
how data associated with the hints should be stored in the cache
110.
Spec. ¶ 23 (emphasis added).
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Application 15/359,829

7

The cache controller 105 is configured to apply one or more
software hint policies 111, 112 that govern how the cache
controller 105 responds to software hints associated with data.
Spec. ¶ 24 (emphasis added).
A processor applies a software hint policy to a portion of a
cache based on access metrics for different test regions of the
cache, wherein each test region applies a different software hint
policy for data associated with cache entries in each region of
the cache.
Abstract.
We find Anantaraman’s disclosure of commands that are sent from
the cache controller does not teach or suggest the broadest reasonable
interpretation consistent with Appellant’s disclosure of the claimed
“software hint.” Contrary to Anantaraman, the claimed hints are sent to, not
from, the cache. Appellant’s definitions clarify that the claimed software
hint is an instruction (Spec. ¶¶ 1, 13, 14) inserted into a set of instructions
(Spec. ¶¶ 1, 23, 24) by a compiler (Spec. ¶¶ 1, 14, 23) which instruction is
executed by a cache controller (Spec. ¶¶ 23, 24).
As found by the Examiner, Anantaraman discloses an instruction
from, not to, a cache controller. Anantaraman discloses: “The lower level
memory [i.e., the cache] sends the request vector to the higher level memory
with the prefetch hint information.” Anantaraman ¶ 16 (cited by Examiner).
Thus, we find the prior art fails to teach the claimed “software hint.” In
view of the foregoing, we decline to sustain the rejection of independent
Claims 1, 10, and 15 and of Claims dependent therefrom.

Appeal 2019-006440
Application 15/359,829

8

CLAIMS 4, 12, AND 17: OBVIOUSNESS OVER
CAIN, ANANTARAMAN, AND ARCHAMBAULT.
The Examiner does not apply Archambault to teach the limitations
discussed above. See Answer 12–15.
In view of the foregoing, we decline to sustain the rejection of Claims
4, 12, and 17.

CLAIMS 6 AND 14: OBVIOUSNESS OVER CAIN, ANANTARAMAN, AND
ARIMILLI.
The Examiner does not apply Arimilli to teach the limitations
discussed above. See Answer 15–17.
In view of the foregoing, we decline to sustain the rejection of Claims
6 and 14.

CLAIM 9: OBVIOUSNESS OVER CAIN, ANANTARAMAN, AND YOCHAI.
The Examiner does not apply Yochai to teach the limitations
discussed above. See Answer 18–19.
In view of the foregoing, we decline to sustain the rejection of Claim
9.

Appeal 2019-006440
Application 15/359,829

9

CONCLUSION
In summary:
Claim(s)
Rejected
35 U.S.C.
§
Reference(s)/Basis Affirmed Reversed
1, 3, 5, 7, 8,
10, 11, 13,
15, 16, 18–
20
103 Cain, Anantaraman 1, 3, 5, 7, 8,
10, 11, 13,
15, 16, 18–
20
4, 12, 17 103 Cain, Anantaraman,
Archambault
4, 12, 17
6, 14 103 Cain, Anantaraman,
Arimilli
6, 14
9 103 Cain, Anantaraman,
Yochai
9
Overall
Outcome
1, 3–20

REVERSED