Ex Parte Takashi et al

Patent Trial and Appeal Board

Apr 30, 2013

11016317 (P.T.A.B. Apr. 30, 2013)

UNITED STATES PATENT AND TRADEMARK OFFICE
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O. Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
11/016,317 12/20/2004 Kikuchi Takashi SEC.1286 7336
7590 04/30/2013
STEPHEN R. WHITT
VOLENTINE FRANCOS & WHITT, PLLC
ONE FREEDOM SQUARE, SUITE 1260
11951 FREEDOM DRIVE
RESTON, VA 20190
EXAMINER
FRECH, KARL D
ART UNIT PAPER NUMBER
2887
MAIL DATE DELIVERY MODE
04/30/2013 PAPER
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
PTOL-90A (Rev. 04/07)

UNITED STATES PATENT AND TRADEMARK OFFICE
____________________

BEFORE THE PATENT TRIAL AND APPEAL BOARD
____________________

Ex parte KIKUCHI TAKASHI and JOONG-CHUL YOON
____________________

Appeal 2010-002707
Application 11/016,317
Technology Center 2800
____________________

Before DEBRA K. STEPHENS, BRUCE R. WINSOR, and
STACEY G. WHITE, Administrative Patent Judges.

STEPHENS, Administrative Patent Judge.

DECISION ON APPEAL
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Application 11/016,317

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Appellants appeal under 35 U.S.C. § 134(a) (2002) from a final
rejection of claims 1-32. We have jurisdiction under 35 U.S.C. § 6(b).
Claims 33-44 have been canceled.
We REVERSE and enter a NEW GROUNDS OF REJECTION
UNDER 37 C.F.R. § 41.50(b).

Introduction
The invention relates to an integrated circuit (IC) card and host in
which current state data related to a first command is stored upon
interruption of the first command by a second command, where after
completion of the second command, the current state information is reloaded
and execution of the first command is resumed (Abstract).

STATEMENT OF THE CASE
Exemplary Claim
Claim 1 is an exemplary claim and is reproduced below with disputed
limitations emphasized:
1. An IC card comprising:
an interface receiving from a host device a first
command and a second command having a higher priority
than the first command;

a processor sequentially executing the first command and
the second command; and

a suspend/resume controller halting an initial execution
of the first command and storing current state information upon
receipt from the host device of a suspend command related to
a second command.
Appeal 2010-002707
Application 11/016,317

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References
Lee US 2004/0195313 A1 Oct. 7, 2004
Yoshimoto US 7,055,752 B2 Jun. 6, 2006

Rejections
(1) Claims 1-15 and 19-29 stand rejected under 35 U.S.C. § 102(e)
as being anticipated by Yoshimoto.
(2) Claims 16-18 and 30-32 stand rejected under
35 U.S.C. § 103(a) as being unpatentable over Yoshimoto and Lee.

ISSUE 1
35 U.S.C. § 102(e): claims 1-15 and 19-29
Appellants argue Yoshimoto fails to disclose “receiving from a host
device a first command and second command having a higher priority than
the first command,” as recited in claim 1 (App. Br. 11). Appellants assert
the halt and operative states (i.e., commands) in Yoshimoto are always
defined in relation to internally generated commands and control signals,
NOT externally received host device commands (App. Br. 13).
Next, Appellants contend Yoshimoto fails to disclose “halting an
initial execution of the first command and storing current state information
upon receipt from the host device of a suspend command related to a second
command,” as recited in claim 1 (App. Br. 11). Appellants maintain
Yoshimoto discloses a HALT operation directed to a CPU during periods of
data communication by the transmission unit in contrast to claimed suspend
operation caused by a suspend command received from the host device
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(App. Br. 12 (citing Yoshimoto, col. 1, l. 56 – col. 2, l. 20)). Appellants
further argue the halt and operative states for the various elements in
Yoshimoto are always defined in relation to internally generated commands
and control signals, NOT externally received host device commands (App.
Br. 13 (citing Yoshimoto, col. 5, ll. 11-35)).
Third, Appellants assert claim 19 recites “reloading the current state
information to the processor and restarting execution of the first command
upon receipt of a resume command from the host device” (App. Br. 16).
Appellants argue Yoshimoto has no disclosure of a host device generated
resume command or operation of a suspend/resume controller in relationship
thereto (App. Br. 17).
Issue 1a: Does Yoshimoto disclose “receiving from a host device a
first command and second command having a higher priority than the first
command,” as recited in claim 1?
Issue 1b: Does Yoshimoto disclose “halting an initial execution of the
first command and storing current state information upon receipt from the
host device of a suspend command related to a second command,” as recited
in claim 1?
Issue 1c: Does Yoshimoto disclose “reloading the current state
information to the processor and restarting execution of the first command
upon receipt of a resume command from the host device,” as recited in claim
19?

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ANALYSIS
Issue 1a:
The Examiner maintains that transmissions from the host of
Yoshimoto are the effective signals relating to the claimed “first command”
and “second command having higher priority than the first command” (Ans.
12-13 (citing Yoshimoto, col. 1, l. 56 – col. 2, l. 20)). We find Yoshimoto
teaches an IC card is brought into contact with a reader/writer so as to
send/receive data (see col. 1, ll. 21-27). Instructions from the reader/writer
to the transmission circuit of the IC card result in the CPU halting execution
of a first command (see col. 2, ll. 6-8). Therefore, Yoshimoto discloses
“receiving . . . a second command having a higher priority than the first
command,” as recited in claims 1 and 19.

Issue 1b:
We further find Yoshimoto teaches the sending/receiving data from
the outside reader/writer gives rise to the state control circuit 107 giving an
inactive state control signal S2 to the CPU 105 causing CPU 105 to stop its
operation (see col. 5, ll. 51-54 and Fig. 1). Thus, Yoshimoto discloses
“halting an initial execution of the first command and storing current state
information upon receipt . . . of a suspend command related to a second
command” as recited in claim 1.

Issue 1c:
We also find Yoshimoto teaches, sending an interruption signal C2
upon completion of the processing of sent data. C2 is used to place CPU
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105 in operative state (see col. 6, ll. 12-17 and Fig. 1). Therefore, the
completion of sending data by the outside reader/writer acts as the suspend
command related to the second command. Thus, Yoshimoto discloses
“reloading the current state information to the processor and restarting
execution of the first command upon receipt of a resume command,” as
recited in claim 19.
However, although we find Yoshimoto describes the halting of
execution of commands due to the receipt of a suspend command (col. 2, ll.
1-8), we find Yoshimoto does not disclose the various commands (first
command, suspend command, and resume command) being received from
the host device. Specifically, we do not find Yoshimoto discloses receiving a
first command from a host device or halting execution of the first command
and storing current state information upon receipt from the host device of a
suspend command (claims 1 and 19); or restarting execution of the first
command upon receipt of a resume command from the host device (claim
19).
Therefore, we find Yoshimoto does not anticipate independent claims
1 and 19.
Because Yoshimoto does not anticipate claims 1 and 19, we do not
sustain the rejection of claims 1-15 and 19-29.
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35 U.S.C. § 103(a): claims 16-18 and 30-32
Because claims 16-18 and 30-32 depend, directly or indirectly, from
claims 1 and 19, respectively, we do not sustain the rejection of claims 16-18
and 30-32 for the reasons discussed above.

NEW GROUND OF REJECTION
35 U.S.C. § 103(a): claims 1 and 19
Using our authority under 37 C.F.R. § 41.50(b), we reject claims 1
and 19 under 35 U.S.C. § 103(a) as being unpatentable over Yoshimoto and
Appellants’ Admitted Prior Art (AAPA).
As discussed above and in the Examiner’s Answer, Ans. 4, we find
Yoshimoto teaches all of the limitations of claim 1, however Yoshimoto
does not explicitly disclose executing a first command received from a host
device. However, the first command executing on the CPU in Yoshimoto
could readily be arranged to be received from the outside reader/writer (see
col. 1, ll. 22-27). Indeed, Appellants’ own Specification in the “Description
of the Related Art” indicates IC cards perform different functions and
employ varying technologies to store and communicate data (Spec. 1,
[0003]; see also Lee [0003]). Additionally, this section further states “IC
cards typically operate in responsive [sic] to a sequence of commands
received from a ‘host device’” (Spec. 1, [0005]). To be nonobvious, an
improvement must be “more than the predictable use of prior art elements
according to their established functions.” KSR Int’l Co. v. Teleflex, Inc., 550
U.S. 398, 417 (2007).
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Here, we find Appellants’ invention as recited in claims 1 and 19
predictably uses prior art elements according to their established functions.
Therefore, we determine the combined teachings of Yoshimoto and AAPA
discloses “receiving from a host device a first command,” as recited in
claims 1 and 19.
Therefore, we reject claims 1 and 19 under 35 U.S.C. § 103(a) as
being unpatentable over Yoshimoto and AAPA.
Although we have rejected independent claims 1 and 19 under
37 C.F.R. § 41.50(b), we have not reviewed their dependent claims 2-18 and
20-32 to the extent necessary to determine whether these claims are
unpatentable under 35 U.S.C. § 103(a) in view of our findings and
conclusions herein. We leave it to the Examiner to determine the
appropriateness of any further rejections based thereon (see MPEP
§ 1213.02).

DECISION
The Examiner’s rejection of claims 1-15 and 19-29 rejected under
35 U.S.C. § 102(e) as being anticipated by Yoshimoto is reversed.
The Examiner’s rejection of claims 16-18 and 30-32 under 35 U.S.C.
§ 103(a) as being unpatentable over Yoshimoto and Lee is reversed.
We have entered a new ground of rejection against claims 1 and 19
under 35 U.S.C. § 103(a) as being unpatentable over Yoshimoto and AAPA.

Appeal 2010-002707
Application 11/016,317

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37 C.F.R. § 41.50(b)
This decision contains a new ground of rejection pursuant to
37 C.F.R. § 41.50(b). 37 C.F.R. § 41.50(b) provides, “[a] new ground of
rejection pursuant to this paragraph shall not be considered final for judicial
review.”
37 C.F.R. § 41.50(b) also provides the Appellants, WITHIN TWO
MONTHS FROM THE DATE OF THE DECISION, must exercise one of
the following two options with respect to the new grounds of rejection to
avoid termination of the appeal as to the rejected claims:
(1) Reopen prosecution. Submit an appropriate
amendment of the claims so rejected or new evidence relating
to the claims so rejected, or both, and have the matter
reconsidered by the examiner, in which event the proceeding
will be remanded to the examiner.…

(2) Request rehearing. Request that the proceeding be
reheard under § 41.52 by the Board upon the same record.

No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a)(1)(iv) (2011).

REVERSED
37 C.F.R. § 41.50(b)

msc