Ex Parte Hwang et al

Patent Trial and Appeal Board

Jan 9, 2017

12416850 (P.T.A.B. Jan. 9, 2017)

United States Patent and Trademark Office
UNITED STATES DEPARTMENT OF COMMERCE
United States Patent and Trademark Office
Address: COMMISSIONER FOR PATENTS
P.O.Box 1450
Alexandria, Virginia 22313-1450
www.uspto.gov
APPLICATION NO. FILING DATE FIRST NAMED INVENTOR ATTORNEY DOCKET NO. CONFIRMATION NO.
12/416,850 04/01/2009 HAU HWANG 082275 5222
23696 7590 01/11/2017
OTTAT mMM TNmRPORATFD
EXAMINER
5775 MOREHOUSE DR.
SAN DIEGO, CA 92121
RAHMJOO, MANUCHEHR
ART UNIT PAPER NUMBER
2667
NOTIFICATION DATE DELIVERY MODE
01/11/2017 ELECTRONIC
Please find below and/or attached an Office communication concerning this application or proceeding.
The time period for reply, if any, is set in the attached communication.
Notice of the Office communication was sent electronically on above-indicated "Notification Date" to the
following e-mail address(es):
us-docketing@qualcomm.com
PTOL-90A (Rev. 04/07)
UNITED STATES PATENT AND TRADEMARK OFFICE
BEFORE THE PATENT TRIAL AND APPEAL BOARD
Ex parte HAU HWANG, SHIZHONG LIU,
JOSEPH CHEUNG, and HYUNG COOK KIM1
Appeal 2016-000280
Application 12/416,850
Technology Center 2600
Before JEAN R. HOMERE, JASON V. MORGAN, and
JEREMY J. CURCURI, Administrative Patent Judges.
MORGAN, Administrative Patent Judge.
DECISION ON APPEAL
Introduction
This is an appeal under 35 U.S.C. § 134(a) from the Examiner’s final
rejection of claims 1—8, 10, 11, 14—17, 21, 22, 24—27, and 29. Claims 9, 12,
13, 18—20, 23, and 28 are canceled or withdrawn. App. Br. 17—21. We have
jurisdiction under 35 U.S.C. § 6(b).
We AFFIRM.
1 Appellants identify Qualcomm Incorporated as the real party in interest.
App. Br. 3.
Appeal 2016-000280
Application 12/416,850
Invention
Appellants invent an apparatus and method to rotate an image (Spec.
11) that allows rotated image data to be stored as out-of-order,
independently decodable pieces {id. 1 56).
Exemplary Claim
Claim 1, reproduced below with key limitations emphasized, is
representative:
1. A method of performing a rotation operation on image data
via one or more processors, the method comprising:
capturing image data of an image, wherein capturing the
image data comprises:
receiving a rotation signal at an input of a
hardware encoder, and
sending a scan order signal from the hardware
encoder to an image capture device based on the rotation
signal to modify a scanning order at the image capture
device;
receiving the image data using said one or more
processors, the image data including a plurality of image
blocks;
calculating a first differential DC value during a rotation
operation of the image by comparing a first DC coefficient
value of a first block of a first row of the image to a second DC
coefficient value of a first block of a second row of the image;
storing the first differential DC value in a memory prior
to completing the rotation operation;
generating a bit stream of the image data with each of a
plurality of minimum coded units (MCUs) rotated; and
encoding the rotated MCUs into independently
decodable pieces of compressed data by inserting a code into
the bit stream following each rotated MCU, wherein the code
allows each MCU to be located individually, indexed, and
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Application 12/416,850
extracted from the bit stream in an order in which the MCUs
will appear in an output data stream.
Rejection
The Examiner rejects claims 1—8, 10, 11, 14—17, 21, 22, 24—27, and
29 under 35 U.S.C. § 103(a) as being unpatentable over Yeung (US 2010/
0104221 Al; Apr. 29, 2010) and Rijavec (US 7,146,053 Bl; Dec. 5, 2006).
Final Act. 2—9.
ANALYSIS
We agree with and adopt as our own the Examiner’s findings of facts
and conclusions as set forth in the Answer and in the Action from which this
appeal was taken. We have considered Appellants’ arguments, but do not
find them persuasive of error. We provide the following explanation for
emphasis.
In rejecting claim 1, the Examiner relies on Rijavec’s insertion of a
restart marker after every MCU to teach or suggest encoding the rotated
MCUs into independently decodable pieces of compressed data by inserting
a code into the bit stream following each rotated MCU, wherein the code
allows each MCU to be located individually, indexed, and extracted from the
bit stream in an order in which the MCUs will appear in an output data
stream. Final Act. 6 (citing, e.g., Rijavec col. 18,1. 60-col. 19,1. 28, col. 24,
1. 45—col. 25,1. 40, and Figs. 26, 27); see also Ans. 5—6.
Appellants contend the Examiner erred because “Rijavec teaches two
separate codes for ‘encoding the rotated MCUs into independently
decodable pieces of compressed data’ and allowing ‘each MCU to be located
individually, index, and extracted . . . .” App. Br. 9—10. In particular,
Appellants argue that “Rijavec teaches two separate codes for independent
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Appeal 2016-000280
Application 12/416,850
encoding and independent location — ‘restart markers’ for independent
encoding of the MCUs and ‘pointers’ for independent location of the
MCUs.” Id. at 10.
Appellants’ arguments are unpersuasive because the Examiner
properly relies on Rijavec’s insertion of a restart marker after every MCU
for purposes of independent encoding as teaching or suggesting a code
following each rotated MCU allowing each MCU to be located individually,
index, and extracted in the manner recited. See Rijavec col. 24,11. 53—57;
Final Act. 6. Appellants do not persuasively distinguish their claimed code
from Rijavec’s use of restart markers after every MCU. Appellants’ own
disclosure of such codes is directed to setting an RST marker interval value
to one such that each MCU is separately decodable. See, e.g., Spec. Tflf 56,
62, and Fig. 5; App. Br. 4.
Appellants’ arguments regarding Rijavec’s pointers are particularly
unpersuasive because the Examiner does not rely on Rijavec’s pointers as
teaching or suggesting the claimed code. Rather, the Examiner properly
cites them as evidence that Rijavec’s independently encoded MCUs are
indexable. See Final Act. 5—6. That is, the restart marker, not the potential
use of pointers, is what teaches or suggests the claimed code.
Furthermore, Appellants argues Rijavec’s “restart markers are not
described as being used for individually locating, indexing, and extracting
the MCU from the bit stream . . .” (Reply Br. 3) is not commensurate with
the scope of the claimed invention. Claim 1 does not recite the claimed code
doing any of these tasks. Rather, claim 1 merely recites the claimed code as
allowing these tasks to be performed.
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Application 12/416,850
Appellants also argue that the Examiner erred in combining the
teachings and suggestions of Yeung and Rijavec because “Yeung already
provides a solution for locating each MCU.” App. Br. 14. Specifically,
Appellants submit that “[e]ach MCU is individually locatable in Yeung so
long as . . . all MCUs and the complete [reconstruction table index] have
been provided.” Id. (emphasis added). Thus, Appellants argue that an
artisan of ordinary skill would not look to Rijavec to modify the teachings
and suggestions of Yeung without the benefit of hindsight. See id.
Appellants’ arguments with respect to the Examiner’s reliance on the
combination of Yeung and Rijavec are unpersuasive because Appellants do
not address the Examiner’s finding that an artisan of ordinary skill would
have recognized that combining Rijavec’s teachings and suggestions with
Yeung’s image rotating and compression teachings would have avoided the
need to accumulate a “whole input image in memory before beginning to
output the rotated image and therefore save storage costs or transmission
time and costs.” Final Act. 7 (citing Rijavec col. 19,11. 20—27). That is, the
Examiner identifies teachings and suggestions in Rijavec showing that
MCUs would be individually locatable before all MCUs have been provided,
thus offering a benefit not available with Yeung alone (which, as Appellants
contend, only allows MCUs to be individually locatable after all MCUs have
been provided). Because Appellants’ arguments are unresponsive to the
Examiner’s findings, we agree with the Examiner’s conclusion that it would
have been obvious to an artisan of ordinary skill to combine the teachings
and suggestions of Yeung and Rijavec in the claimed manner.
For these reasons, we agree with the Examiner that the combination of
Yeung and Rijavec teaches or suggests:
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Appeal 2016-000280
Application 12/416,850
encoding the rotated MCUs into independently decodable
pieces of compressed data by inserting a code into the bit
stream following each rotated MCU, wherein the code allows
each MCU to be located individually, indexed, and extracted
from the bit stream in an order in which the MCUs will appear
in an output data stream,
as recited in claim 1.
Accordingly, we sustain the Examiner’s 35 U.S.C. § 103(a) rejection
of claim 1, and claims 2—8, 10, 11, 14—17, 21, 22, 24—27, and 29, which
Appellants do not argue separately. App. Br. 12.
DECISION
We affirm the Examiner’s decision rejecting claims 1—8, 10, 11, 14—
17, 21, 22, 24—27, and 29.
No time period for taking any subsequent action in connection with
this appeal may be extended under 37 C.F.R. § 1.136(a). See 37 C.F.R.
§ 41.50(f).
AFFIRMED
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