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United States Ethernet Innovations, LLC v. Acer, Inc.

UNITED STATES DISTRICT COURT FOR THE NORTHERN DISTRICT OF CALIFORNIA SAN FRANCISCO DIVISION
Jan 31, 2012
NO. C 10-03724 JW (N.D. Cal. Jan. 31, 2012)

Opinion

NO. C 10-03724 JW NO. C 10-05254 JW NO. C 10-03481 JW

01-31-2012

U.S. Ethernet Innovations, LLC, Plaintiff, v. Acer, Inc., et al., AT&T, Inc., et al., Defendants. Zions Bancorporation, et al., Plaintiffs, v. U.S. Ethernet Innovations, LLC, Defendant.


FIRST CLAIM CONSTRUCTION ORDER


I. INTRODUCTION

U.S. Ethernet Innovations, LLC ("Plaintiff") brings this action against a number of companies (collectively, "Defendants"), alleging infringement of U.S. Patent Nos. 5,307,459 (the '459 Patent); 4,434,872 (the '872 Patent); 5,732,094 (the '094 Patent); and 5,299,313 (the '313) (collectively, the "Patents-in-Suit"). The Patents-in-Suit pertain to network interface adapters. Plaintiff alleges that Defendants infringe the Patents-in-Suit by manufacturing, using and selling certain semiconductor chips, motherboards and computer products.

For ease of reference, the Court divides Defendants into three categories: (1) the companies that supply the semiconductor chips that are incorporated into the accused products (the "Chip Supplier Defendants"), the original equipment manufacturers that make and sell the accused computer products (the "OEM Defendants"), and the companies that use the computer products (the "Retailer Defendants"). The Chip Supplier Defendants include Atheros Communications, Inc. ("Atheros"), Intel Corporation ("Intel"), Marvell Semiconductor, Inc. ("Marvell") and NVIDIA Corporation ("NVIDIA"). The OEM Defendants include Acer, Inc.; Acer America Corporation; Apple, Inc.; ASUS Computer International; ASUSTeK Computer, Inc.; Dell, Inc.; Fujitsu Ltd.; Fujitsu America, Inc.; Gateway, Inc.; Hewlett Packard Co.; Sony Corporation; Sony Corporation of America; Sony Electronics Inc.; Toshiba Corporation; Toshiba America, Inc.; and Toshiba America Information Systems, Inc. The Retailer Defendants include AT&T Mobility, LLC; Barnes & Noble, Inc.; Claire's Boutiques, Inc.; J.C. Penney Company, Inc.; Sally Beauty Holdings, Inc.; Ann Taylor Stores Corporation; Ann Taylor Retail, Inc.; Harley-Davidson, Inc.; Harley-Davidson Motor Company, Inc.; Kirkland's Inc.; Kirkland's Stores, Inc.; Macy's, Inc.; Macy's Retail Holdings, Inc.; Macy's West Stores, Inc.; New York & Company, Inc.; Lerner New York, Inc.; Radioshack Corporation; Rent-A-Center, Inc.; and The Dress Barn, Inc.

On October 21, 2011, the Court conducted a hearing in accordance with Markman v. Westview Instruments, Inc., to construe language of the asserted claims over which there is a dispute. This First Claim Construction Order sets forth the Court's construction of the disputed words and phrases.

517 U.S. 370 (1996).

II. STANDARDS AND PROCEDURES FOR CLAIM CONSTRUCTION

A. General Principles of Claim Construction

Claim construction is a matter of law, to be decided exclusively by the Court. Markman, 517 U.S. at 387. In accordance with the Patent Local Rules of the Northern District, the parties submit their joint selection of the ten disputed terms that are significant in resolving the case as well as their proposed definitions for construction. See Patent L.R. 4-3. After the Markman hearing and upon consideration of the parties' briefs, the Court issues an order construing the meaning of the disputed terms. The Court's construction becomes the legally operative meaning of the disputed terms that governs further proceedings in the case. See Chimie v. PPG Indus., Inc., 402 F.3d 1371, 1377 (Fed. Cir. 2005). Although greater weight should always be given to the intrinsic evidence, claim construction is a fluid process in which the Court may consider a number of extrinsic sources of evidence, so long as they do not contradict the intrinsic evidence. See Vitronics Corp. v. Conceptronic, Inc., 90 F.3d 1576, 1582-83 (Fed. Cir. 1996). B. Construction from the Viewpoint of an Ordinarily Skilled Artisan

Phillips v. AWH Corp., 415 F.3d 1303, 1324 (Fed. Cir. 2005).

A patent's claims define the scope of the patent: the invention that the patentee may exclude others from practicing. Phillips, 415 F.3d at 1312. The Court generally gives the patent's claims their ordinary and customary meaning. In construing the ordinary and customary meaning of a patent claim, the Court does so from the viewpoint of a person of ordinary skill in the art at the time of the invention, which is considered to be the effective filing date of the patent application. Thus, the Court seeks to construe the patent claim in accordance with what a person of ordinary skill in the art would have understood the claim to have meant at the time the patent application was filed. This inquiry forms an objective baseline from which the Court begins its claim construction. Id. at 1313.

The Court proceeds from that baseline under the premise that a person of ordinary skill in the art would interpret claim language not only in the context of the particular claim in which the language appears, but also in the context of the entire patent specification of which it is a part. Phillips, 415 F.3d at 1313. Additionally, the Court considers that a person of ordinary skill in the art would consult the rest of the intrinsic record, including any surrounding claims, the drawings and the prosecution history, if it is in evidence. Id..; see also Teleflex, Inc. v. Fisosa N. Am. Corp., 299 F.3d 1313, 1324 (Fed. Cir. 2002). In reading the intrinsic evidence, a person of ordinary skill in the art would give consideration to whether the disputed term is a term commonly used in lay language, a technical term, or a term defined by the patentee. C. Commonly Used Terms

In some cases, disputed claim language involves a commonly understood term that is readily apparent to the Court. In such a case, the Court considers that a person of ordinary skill in the art would give the term its widely accepted meaning, unless a specialized definition is stated in the patent specification or was stated by the patentee during prosecution of the patent. In articulating the widely accepted meaning of such a term, the Court may consult a general purpose dictionary. Phillips, 415 F.3d at 1314. D. Technical Terms

If a disputed term is a technical term in the field of the invention, the Court considers that one of skill in the art would give the term its ordinary and customary meaning in that technical field, unless a specialized definition is stated in the specification or during prosecution of the patent. Phillips, 415 F.3d at 1314. In arriving at this definition, the Court may consult a technical art-specific dictionary or invite the parties to present testimony from experts in the field on the ordinary and customary definition of the technical term at the time of the invention. Id. E. Defined Terms

It is well established that a patentee is free to act as his or her own lexicographer. See, e.g., Process Control Corp. v. HydReclaim Corp., 190 F.3d 1350, 1357 (Fed. Cir. 1999). Acting as such, the patentee may use a term differently than a person of ordinary skill in the art would understand it, without the benefit of the patentee's definition. Vitronics Corp., 90 F.3d at 1582. Thus, the Court examines the claims and the intrinsic evidence to determine if the patentee used a term with a specialized meaning.

The Court regards a specialized definition of a term stated in the specification as highly persuasive of the meaning of the term as it is used in a claim. Phillips, 415 F.3d at 1316-17. However, the definition must be stated in clear words which make it apparent to the Court that the term has been defined. See id.; Vitronics Corp., 90 F.3d at 1582. If the definition is not clearly stated or cannot be reasonably inferred, the Court may decline to construe the term pending further proceedings. Statements made by the patentee in the prosecution of the patent application as to the scope of the invention may be considered when deciding the meaning of the claims. Microsoft Corp. v. Multi-Tech Systems, Inc., 357 F.3d 1340, 1349 (Fed. Cir. 2004). Accordingly, the Court may also examine the prosecution history of the patent when considering whether to construe the claim term as having a specialized definition.

In construing claims, it is for the Court to determine the terms that require construction and those that do not. See U.S. Surgical Corp. v. Ethicon, Inc., 103 F.3d 1554, 1568 (Fed. Cir. 1997). Moreover, the Court is not required to adopt a construction of a term, even if the parties have stipulated to it. Pfizer, Inc. v. Teva Pharm. USA, Inc., 429 F.3d 1364, 1376 (Fed. Cir. 2005). Instead, the Court may arrive at its own constructions of claim terms, which may differ from the constructions proposed by the parties.

III. DISCUSSION

Pursuant to the Patent Local Rules, the parties have tendered ten terms that they have identified as significant to resolving these cases. The Court will discuss the terms in relation to the first issued patent in which they appear. A. The '313 Patent

Since the parties have identified disputed terms, but have not tied their dispute to particular claims in which the disputed terms appear, the Court will use independent Claim 1 as the starting point for its analysis. Subject to further proceedings, the Court's construction of any particular disputed term is presumed to apply consistently across all claims in the Patents-in-Suit in which the term appears. See, e.g., Paragon Solutions, LLC v. Timex Corp., 566 F.3d 1075, 1087 (Fed. Cir. 2009).

The '313 Patent is entitled "Network interface with host independent buffer management." The Abstract of the '313 Patent describes the invention as follows:

A network interface controller controls communication between a host system and a network transceiver coupled to a network comprises a memory outside of the host address space in which receive and transmit buffers are managed, host interface logic emulating memory mapped registers in the host address space, for transferring data between the host address space and the buffer memory, and network interface logic coupled with the network transceiver, for transferring data between the buffers in the buffer memory and the network transceiver. The buffer memory includes a transmit descriptor ring buffer, transmit data buffer, transfer descriptor buffer, and receive ring buffer all managed by operations transparent to the host.

1. Claim 1

Claim 1 of the '313 Patent claims:

Unless otherwise indicated, all bold typeface is added by the Court for emphasis.

An apparatus for controlling communication between a host system and a network transceiver coupled with a network, wherein the host system includes a host address space, comprising:
a buffer memory outside of the host address space;
host interface means, sharing the host address space with the host, for managing data transfers between the host address space and the buffer memory in operations transparent to the host system; and
network interface means, coupled with the network transceiver, for managing data transfers between the buffer memory and the network transceiver.

a. "host system"

The parties dispute the meaning of the phrase "host system," as used in Claim 1. Throughout the written description of the '313 Patent, the inventors use the word "host" and the phrase "host system." For example, the inventors describe Figure 1 as follows:

The computer system includes a host system, including a host processor 10, host memory 11, and other host devices 12, all communicating through a host system bus 13, such as an EISA bus. The host system bus 13 includes address lines which define a host system address space. Typically, for an EISA bus, there are 32 address lines establishing a host system address space of about 4 Gigabytes.
('313 Patent, Col. 4:8-15.)

A person of ordinary skill in the art would understand that the inventors are using the phrase "host system" with its commonly understood meaning, i.e., a computer system that provides connectivity and electronic service to an apparatus that is attached to the system.

See, e.g., Microsoft Computer Dictionary 256 (5th ed. 2002) (defining "host" as: (1) "[t]he main computer in a mainframe or minicomputer environment-that is, the computer to which terminals are connected"; (2) "[i]n PC-based networks, a computer that provides access to other computers"; and (3) "[o]n the Internet or other large networks, a server computer that has access to other computers on the network. A host computer provides services, such as news, mail, or data, to computers that connect to it.").

Accordingly, the Court construes the phrase "host system" to mean:

a computer system to which an apparatus may be connected and which provides system resources to the apparatus.

b. "host address space"

The Preamble to Claim 1 provides: "wherein the host system includes a host address space comprising . . . ." The parties dispute the meaning of the phrase "host address space."

In the written description, the inventors use the phrase "host address space" interchangeably with the phrases "host system address space" and "host address block":

FIG. 4 is a map of host system address space used for the transmission and reception of data according to the present invention.
('313 Patent, Col. 3:42-45.)
FIG. 4 provides a simplified map of the adaptor interface host address block 101. The addresses within this block appear to the host like memory mapped registers in a continuous 8k block of the host address space in the preferred system.
('313 Patent, Col. 10:19-23.)

A person of ordinary skill in the art would understand that the inventors use the phrase "host address space" to refer to components of the host system that can be used by embodiments of the apparatus in various ways. For example, it is used by the inventors to refer to addresses on the host system bus that can be used by the apparatus as if it were memory. The inventors also use the phrase to refer to a pre-specified range of addresses on the host system bus that can be used as if it were memory mapped registers.

"As mentioned above, the host system will include a host memory space (generally 100) defined by the addresses on the host bus. A pre-specified block 101 of the host memory space is set aside for the adapter interface addresses." ('313 Patent, Col. 9:44-48.) "The host system bus 13 includes address lines which define a host system address space. Typically, for an EISA bus, there are 32 address lines establishing a host system address space of about 4 Gigabytes." ('313 Patent, Col. 4:11-15.)

"FIG. 4 provides a simplified map of the adapter interface host address block 101. The addresses within this block appear to the host like memory mapped registers in a continuous 8K block of the host address space in a preferred system." ('313 Patent, Col. 10:19-23.)
"The present invention provides a network interface controller which controls communication between a host system and a network transceiver coupled to a network which comprises a buffer memory outside of the host address space in which receive and transmit buffers are managed, host interface logic responsive to a prespecified range of host addresses, like memory mapped registers in the host address space, for mapping data between the host address space and the buffer memory . . . ." ('313 Patent, Col. 1:612:2.)
"Because the host interface logic and network interface logic manage accesses to the buffer memory, the host system is able to access the multiple data buffers for transmitting and receiving data through a limited prespecified address range. The dedicated memory mapped page in host address space is automatically remapped through the host interface logic into the buffer memory in operations that are transparent to the host." ('313 Patent, Col. 2:614.)
"Although the 'registers' are memory mapped to an arbitrary prespecified block of host address space, none of the reads or writes performed by the host system to these registers actually directly access the adapter memory. Rather, the accesses to the memory mapped space are interpreted by the host interface logic 104 transparent to the host system. Thus, the memory in the adapter is independent of the host address space and of host management." ('313 Patent, Col. 10:2937.)

Accordingly, the Court construes "host address space" to mean:

addresses on the host system bus that can be used as space for data.

c. "host interface means"

The parties dispute whether the "host interface means" limitation should be construed as a means-plus-function limitation, and also dispute the meaning of the phrase "for managing data transfers between the host address space and the buffer memory in operations transparent to the host system."

i. Applicability of means-plus-function construction

Title 35 U.S.C. § 112 ¶ 6 provides:

An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.

A claim limitation that actually uses the word "means" invokes a rebuttable presumption that § 112 ¶ 6 applies. The presumption may be rebutted if the claim: (1) recites no function corresponding to the means; or (2) also recites "sufficient structure or material for performing that function." Rodime PLC v. Seagate Tech., Inc., 174 F.3d 1294, 1302 (Fed. Cir. 1999). "Sufficient structure exists when the claim language specifies the exact structure that performs the functions in question without need to resort to other portions of the specification or extrinsic evidence for an adequate understanding of the structure." TriMed, Inc. v. Stryker Corp., 514 F.3d 1256, 1259-60 (Fed. Cir. 2008) (citations omitted). A proper recitation of specific structure need not include "every last detail of structure disclosed in the specification for performing the claimed . . . function." Rodime, 174 F.3d at 1304. Further, sufficient structure may be disclosed when a "term, as the name for structure, has a reasonably well understood meaning in the art." Watts v. XL Sys., Inc., 232 F.3d 877, 880-81 (Fed. Cir. 2000) (citing Greenberg v. Ethicon Endo-Surgery, Inc., 91 F.3d 1580, 1583 (Fed. Cir. 1996)). Also, a court may look to the written description for support of the structure recited in the claims. See, e.g., TI Grp. Auto. Sys. (N. Am.), Inc. v. VDO N. Am., L.L.C., 375 F.3d 1126, 1135 (Fed. Cir. 2004).

In this case, the inventors' use of the tag word "means" raises a rebuttable presumption that § 112 ¶ 6 applies. Thus, the issue becomes whether the presumption is rebutted by the lack of recitation of a function or by a sufficient recitation of structure. As to the first of these questions, the Court finds that the inventors clearly recite a function, namely, "for managing data transfers." As to the second of these questions, in addition to the tag word "means," the limitation includes the modifier "host interface." Thus, the issue becomes whether a person of ordinary skill in the art would understand "host interface means" to be a recitation of structure. Here, the inventors use the word "interface" to refer to a point where two things meet or interact. For example, in the "Summary of the Invention" section of the written description, the inventors use the phrase "network interface controller." From the written description, a person of ordinary skill would understand that the "controller" is an apparatus that controls communication between a host system and a network transceiver. ('313 Patent, Col. 2:61-65.) Further, the modifier "interface" is used to disclose the location of the controller as being between a host system and a network transceiver. As such, the Court finds that the inventors do not use the word "interface" to denote structure. Rather, throughout the written description, the word "interface" is used with its commonly understood meaning, i.e., the point or location where two or more separate elements come in contact with one another.

See, e.g., WEBSTER'S NINTH NEW COLLEGIATE DICTIONARY 631 (1990) (defining "interface" as "the place at which independent systems meet and act on or communicate with each other" or "an area in which diverse things interact").

The Court finds that "host interface means" is not a structure that has "a reasonably well understood meaning in the art." Watts, 232 F.3d at 880-81. Consequently, the Court finds that "host interface means" is not a recitation of structure sufficient to rebut the applicability of § 112 ¶ 6. Thus, the Court finds that § 112 ¶ 6 applies. Accordingly, the Court must decide the function of the host interface means and identify any "corresponding structure in the written description that is necessary to perform that function." Altiris, Inc. v. Symantec Corp., 318 F.3d 1363, 1375 (Fed. Cir. 2003).

The Federal Circuit has suggested that the rebuttable presumption may apply even though the word "means" was modified by a term that normally connotes structure. See DESA IP, LLC v. EML Tech., LLC, 211 Fed. Appx. 932, 936-37 (Fed. Cir. 2007).

ii. "for managing data transfers between the host address space and the buffer memory in operations

transparent to the host system"

The parties do not dispute that the function of "host interface means" is "for managing data transfers between the host address space and the buffer memory in operations transparent to the host system." However, the parties dispute the meaning of "host address space" and "operations transparent to the host system."

As discussed earlier, the Court has construed the phrase "host address space" with respect to the Preamble. The same definition applies to the use of that phrase in this limitation.

iii. "in operations transparent to the host system"

The phrase "in operations transparent to the host system" is a limitation on how the function is performed. If a means-plus-function limitation contains a limitation on how the disclosed function is performed, the corresponding structure must be capable of performing the function with that additional limitation. Therefore, if there is a dispute over the words and phrases used in disclosing an additional limitation, the Court must construe the meaning of the words and phrases used in the additional limitation before examining the written description for corresponding structure.

In the written description, in a discussion of Figure 4, the inventors use the word "transparent" to refer to an operation that can be performed independent of, and without management by, the host system:

Although the 'registers' are memory mapped to an arbitrary prespecified block of host address space, none of the reads or writes performed by the host system to these registers actually directly access the adapter memory. Rather, the accesses to the memory mapped space are interpreted by the host interface logic 104 transparent to the host system. Thus, the memory in the adapter is independent of the host address space and of host management.
('313 Patent, Col. 10:29-39.)

Accordingly, the Court construes "in operations transparent to the host system" to mean:

in operations performed independently of management by the host system. Consequently, the Court construes the function of "host interface means" as:
for managing data transfers between address spaces on the host system bus and the buffer memory in operations performed independently of management by the host system.

iv. corresponding structure

As a preliminary matter, the parties dispute the appropriate degree of specificity that the Court should use in identifying the corresponding structure.

"[S]tructure disclosed in the specification is 'corresponding' structure only if the specification or prosecution history clearly links or associates that structure to the function recited in the claim." B. Braun Med., Inc. v. Abbott Labs., 124 F.3d 1419, 1424 (Fed. Cir. 1997). In other words, the structure must be necessary to perform the claimed function. See Northrop Grumman Corp. v. Intel Corp., 325 F.3d 1346, 1352 (Fed. Cir. 2003). The relevant structure is that which corresponds to the recited function. See Chiuminatta Concrete Concepts, Inc. v. Cardinal Indus., Inc., 145 F.3d 1303, 1308-09 (Fed. Cir. 1998). Because the corresponding structure and its equivalent is limiting, any corresponding structure disclosed in the specification should be clearly identified. See Kahn v. General Motors Corp., 135 F.3d 1472, 1476 (Fed. Cir. 1998). However, the written description need not explicitly describe the corresponding structure. See Atmel Corp. v. Info. Storage Devices, Inc., 198 F.3d 1374, 1381-82 (Fed. Cir. 1999). If the written description contains an implicit description that a person of ordinary skill in the art would recognize as performing the recited function, the statutory requirement is satisfied. Id.

In this case, the parties' respective contentions with respect to corresponding structures were asserted prior to the Court's construction the function. As such, the Court finds that it would benefit from further briefing on the issue of corresponding structures. In their supplemental briefs, the parties shall address the level of specificity that should be used in identifying the corresponding structure as follows:

(1) The parties shall identify each structure in the written description that the party contends is necessary to perform the function identified by the Court and that is linked to that function by the disclosure (drawings or language) in the specification.
(2) As to each structure, the parties shall explain why the structure is necessary and linked, and must cite the passage of the specification upon which the party relies.
(3) To the extent a party contends that a particular level of detail is required in order for a structure to qualify as corresponding, the party must explain why that level of detail is required.

d. "network interface means"

Claim 1 of the '313 Patent discloses that the apparatus comprises "network interface means, coupled with the network transceiver, for managing data transfers between the buffer memory and the network transceiver." For convenience, the Court will refer to this as the "network interface means limitation." The parties dispute whether § 112 ¶ 6 applies to this limitation.

For the same reasons discussed with respect to the "host interface means" limitation, the Court finds that the "network interface means" limitation is governed by § 112 ¶ 6. Undisputedly, the function of the "network interface means" is "for managing data transfers between the buffer memory and the network transceiver." Further, as discussed above, the Court finds that it would benefit from further briefing on the issue of corresponding structures as to this function. In doing so, the parties shall adhere to the same directions regarding the level of specificity for identifying and explaining such corresponding structures that is outlined above.

The inventors disclose a "network interface means, coupled with the network transceiver" for performing a recited function. This raises the question of whether the function is performed by the means alone, or is performed jointly by the "coupled" means and the network transceiver. The Court adopts the former construction.

2. Claim 3

Claim 3 of the '313 Patent claims:

The apparatus of claim 1, wherein the host interface means includes:

transmit descriptor logic for mapping transmit descriptors identifying data to be transmitted from the host system to the buffer memory; and
download logic, responsive to transmit descriptors in the buffer memory, for retrieving data from memory in the host address space and storing retrieved data in the buffer memory.

The parties dispute the meaning of the word "logic" as used in Claim 3 of the '313 Patent. The word logic is widely used by the inventors in the Claims of the '313 Patent and in the written description. The Court finds that a person of ordinary skill in the art would understand that with respect to computer systems, the word "logic" can be used to mean a wide range of things, depending on how the word is used. For example, "logic" may denote hardware structures, as in "logic gates" and "logic circuits"; it may denote software routines, as in "programming logic" and "logic algorithm"; or it may have abstract meanings, as in "mathematical logic" and "symbolic logic."

For example, the word "logic" is used in at least the following phrases: "host interface logic," "network interface logic," "DMA logic," "download logic," "upload logic," "transmit descriptor logic," "transfer descriptor logic," "view logic," "receive logic," "transmit logic," "transmit ring pointer logic," "receive ring pointer logic," "conversion logic," and "adaptor mode logic."

See, e.g., WEBSTER'S NEW WORLD COMPUTER DICTIONARY 218 (10th ed. 2003) (defining, inter alia, such terms as "logical address," "logical network," "logic bomb" and "logic gate").

In neither the claim nor the written description do the inventors disclose whether the "transmit descriptor logic" or the "download logic" as used in Claim 3 of the '313 Patent is hardware, software or a combination of both. Without reaching the issue of whether it would be permissible to leave its implementation unspecified, at this time the Court declines to construe the word "logic" on the ground that the lack of specificity renders Claim 3 arguably ambiguous. The Court invites the parties to address this issue. The parties are ordered to meet and confer with respect to ten phrases that includes the word "logic" and that are in dispute, and to file a joint submission regarding their respective constructions of those phrases.

3. Claim 13

Claim 13 of the '313 Patent claims:

An apparatus for controlling communication between a host system and a network transceiver coupled with a network, wherein the host system includes a host address space, comprising:
a buffer memory outside of the host address space, including a transmit buffer and a receive buffer;
host interface means, sharing host address space including a prespecified block of host addresses of limited size defining a first
area and a second area, and coupled with the buffer memory, for mapping data addressed to the first area into the transmit buffer, mapping data in the receive buffer into the second area, and uploading data from the receive buffer to the host; and
network interface means, coupled with the network transceiver and the buffer memory, for transferring data from the transmit buffer to the network transceiver and mapping data into the receive buffer from the network transceiver.

With respect to Claim 13 of the '313 Patent, the only dispute tendered to the Court for resolution is whether § 112 ¶ 6 applies to the "network interface means" limitation. For the same reasons discussed with respect to the "network interface means" limitation disclosed in Claim 1, the Court finds that the "network interface means" limitation in Claim 13 is governed by § 112 ¶ 6, and has the same meaning as it has in Claim 1, and should be addressed similarly in supplemental briefing. B. The '459 Patent

The '459 Patent is entitled "Network adapter with host indication optimization." The Abstract of the '459 Patent describes the invention as follows:

Optimized indication signals of a completed data frame transfer are generated by a network adapter which reduces host processor interrupt latency. The network adapter comprises network interface logic for transferring the data frame between the network and a buffer memory and host interface logic for transferring the data frame between the buffer memory and the host system. The network adapter further includes threshold logic where a threshold value in an alterable storage location is compared to a data transfer counter in order to generate an early indication signal. The early indication signal may be used to generate an early interrupt signal to a host processor before a transfer of a data frame is completed. The network adapter also posts status information status registers which may be used by the host processor to tune the timing of the generation of the network adapter interrupt signal.

1. Claim 1

Claim 1 of the '459 Patent claims:

An apparatus for transferring a data frame between a network transceiver, coupled with a network, and a host system which includes a host processor and host memory, the apparatus generating an indication signal to the host processor responsive to the transfer of the data frame, with the host processor responding to the indication signal after a period of time, comprising:
a buffer memory for storing the data frame;
network interface logic for transferring the data frame between the network transceiver and the buffer memory;
host interface logic for transferring the data frame between the host system and the buffer memory;
threshold logic for allowing the period of time for the host processor to respond to the indication signal to occur during the transferring of the data frame, wherein the threshold logic includes,
a counter, coupled to the buffer memory, for counting the amount of data transferred to or from the buffer memory;
an alterable storage location containing a threshold value; and
means for comparing the counter to the threshold value in the alterable storage location and generating an indication signal to the host processor responsive to a comparison of the counter and the alterable storage location.

The parties dispute the construction of the "means for comparing" limitation. The parties agree that this limitation should be construed under § 112 ¶ 6, and that the function performed by the claimed "means" is "comparing the counter to the threshold value in the alterable storage location and generating an indication signal to the host processor responsive to a comparison of the counter and the alterable storage location." However, the parties dispute what structure or structures disclosed in the written description qualify as corresponding structure. As discussed above, the Court finds that it would benefit from further briefing on the issue of corresponding structures. In doing so, the parties shall adhere to the directions outlined above regarding the level of specificity for identifying and explaining such corresponding structures.

2. Claim 22

Claim 22 of the '459 Patent claims:

A network adapter for receiving a data frame from a network transceiver, coupled with a network and a host system which includes an interruptable host processor with interrupt latency and host memory, comprising:
a buffer memory for storing the data frame;
receive logic for receiving the data frame from the network transceiver to the buffer memory;
receive threshold logic for generating an indication signal during the receiving of the data frame, wherein the receive threshold logic includes,
a counter, coupled to the buffer memory, for counting the amount of data received by the buffer memory;
an alterable storage location containing a receive threshold
value;
means for comparing the counter to the receive threshold value in the alterable storage location and generating an indication signal responsive to a comparison of the counter and the alterable storage location; and
host interface logic for transferring the data frame from the buffer memory to the host system, wherein host interface logic includes,
control means for generating an interrupt signal to the host processor, responsive to the indication signal, which reduces host processor interrupt latency.

The parties dispute the meaning of the phrase "interrupt latency." A person of ordinary skill in the art would understand that Claim 22 claims the invention of an apparatus "which reduces host processor interrupt latency." The disputed phrase is included in two longer phrases in Claim 22. First, the phrase "host processor with interrupt latency" appears in the Preamble. Second, the disputed phrase also appears in a longer phrase in the "control means" limitation: "control means for generating an interrupt signal to the host processor, responsive to the indication signal, which reduces host processor interrupt latency."

a. "host processor with interrupt latency"

Claim 22 claims an apparatus coupled with a host system. In their first use of the phrase "interrupt latency," the inventors use it to describe an inherent feature of the host system, i.e., a host system that includes an interruptable host processor "with interrupt latency." From the Background section of the written description, it is clear that when the inventors use the phrase "host processor with interrupt latency," they are describing a feature of prior art:

In prior art systems, such as the National Semiconductor DP83932B, a systems-oriented network interface controller (SONIC) and the Intel 82586 local area network co-processor, an interrupt is generated by the network adapter to the host processor on the completion of a data transfer. The host processor then must determine the cause of the interrupt by examining the appropriate network adapter status registers and take the appropriate action. However, before the host processor services the interrupt, the host processor must save its current environment or system parameters. This routine of saving the host processor's current environment may take as long as 30ms for a OS/2 operating system. The period of time necessary for saving the host processor's environment depends upon the type of host processor used, the host computer system configuration and when the interrupt /ccurred [sic].
('459 Patent, Col. 1:46-62.)

Thus, the Court finds that in using the phrase "host processor with interrupt latency," the inventors are describing the inherent delay that takes place between the point in time when the processor receives an "interrupt" and when the processor is able to service the interrupt.

b. "control means for generating an interrupt signal to the host processor, responsive to the indication signal, which reduces host processor interrupt latency"

The parties' dispute over the proper construction of "interrupt latency" raises an issue with respect to whether the phrase should be given a different construction when it is used in the "control means" limitation. As discussed above, processor interrupt latency is an inherent part of the host processor and, as such, cannot be "reduced." Although Claim 22 uses the phrase "reduces host processor interrupt latency," a person of ordinary skill in the art would understand that the inventors are not using the word "reduce" to mean an actual reduction in the host processor's inherent interrupt latency, but instead are using it to mean an apparent or effective reduction in delay. This apparent or effective reduction in delay is achieved because the invention sends an "interrupt" while the data transfer is in process. The remainder of the transfer occurs during the interrupt latency time period. Thus, the delay that was experienced in prior art systems that waited for the transfer to be completed before sending an "interrupt" is effectively reduced or eliminated in the invention. By sending an interrupt signal before the full data frame has been transferred, and timing the sending in such a manner that the full data frame will have been transferred by the time the processor turns its attention to servicing the interrupt, an efficiency in time is gained over a system that waits for full data frame transfer before sending the interrupt.

In construing the disputed language, the Court leaves for later consideration the question of whether the phrase is: (1) limiting or (2) effectively a "whereby" clause, i.e., words of the Claim that are merely a recitation of the necessary result of the functioning of the previously recited apparatus, and which add nothing to the substance of the Claim.

In discussing an embodiment that practices this invention, the inventors state:

Threshold logic 10 in network adapter 3 is designed for eliminating or reducing interrupt latency. Threshold logic 10 makes a determination of how much of a data frame is transferred before generating an early indication signal. The early indication signal may then cause an early interrupt signal to be generated during the transfer of a data frame. Moreover, threshold logic 10 is designed such that the time required for transferring the remainder of the data frame should approximately equal the time required for host processor 5 save its system parameters. Therefore, interrupt latency is eliminated or reduced by allowing host processor 5's interrupt routine to coincide with the transfer of the remainder of the data frame.
('459 Patent, Col. 6:9-22.)

In the "Conclusion" section of the written description, the inventors state:

Therefore, the present invention reduces host processor interrupt latency by generating early indications of data frame transfers. These early indications then may be used to generate an early interrupt to the host processor before the data frame is transferred which allows the host processor to save its current environment during a data frame transfer.
('459 Patent, Col. 41:44-50.)

Accordingly, in the limitation, "control means for generating an interrupt signal to the host processor, responsive to the indication signal, which reduces host processor interrupt latency," the Court construes "which reduces host processor interrupt latency" to mean:

an apparent reduction in interrupt latency achieved by sending an interrupt signal before the data frame transfer has been completed.
C. The '094 Patent

The Court reserves for later consideration the question of whether it is appropriate for the Court to include an explanation of how the invention effectively reduces interrupt latency. In particular, although the inventors discuss an effective reduction in interrupt latency, the Court declines to consider at this time whether effective reduction in interrupt latency is claimed.

The '094 Patent is entitled "Method for automatic initiation of data transmission." The Abstract of the '094 Patent describes the invention as follows:

Early initiation of transmission of data in a network interface that includes a dedicated transmit buffer is provided in a system which includes logic for transferring frames of data composed by the host computer into the transmit buffer. The amount of data of a frame which is downloaded by the host to the transmit buffer is monitored to make a threshold determination of an amount of data of the frame resident in the transmit data buffer. The network interface controller includes logic for initiating transmission of the frame when the threshold determination indicates that a sufficient portion of the frame is resident in the transmit buffer, and prior to transfer of all of the data of the frame into the transmit buffer. The monitoring logic includes a threshold store, which is programmable by the host computer for storing a threshold value. Thus, the threshold value may be set by the host system to optimize performance in a given setting.

Claim 1 of the '094 Patent claims:

A method for transmitting a frame of data from a host system through a network interface device to a network, comprising:
executing a frame transfer task initiated in the host system to transfer a frame to a buffer memory in the network interface device; and
executing a frame transmission task in the network interface device to initiate transmission of the frame from the buffer memory to the network in
parallel with the frame transfer task before the frame is completely transferred to the buffer memory.

The parties dispute whether the phrase "executing a frame transmission task" is so ambiguous as to render Claim 1 indefinite and also to cause Claim 1 to fail to satisfy the written description requirements of 35 U.S.C. § 112 ¶¶ 1-2.

The purpose of the definiteness requirement is to "ensure that the claims delineate the scope of the invention using language that adequately notifies the public of the patentee's right to exclude." Datamize, LLC v. Plumtree Software, Inc., 417 F.3d 1342, 1347 (Fed. Cir. 2005). Claims are considered indefinite when they are "not amenable to construction" or are "insolubly ambiguous." Id. Thus, the "definiteness of claim terms depends on whether those terms can be given any reasonable meaning." Id. However, a claim is not indefinite "merely because it poses a difficult issue of claim construction." Exxon Research & Eng'g Co. v. United States, 265 F.3d 1371, 1375 (Fed. Cir. 2001). Rather, if the "meaning of the claim is discernible, even though the task may be formidable and the conclusion may be one over which reasonable persons will disagree," the claim is "sufficiently clear to avoid invalidity on indefiniteness grounds." Id.

Here, the phrase "executing a frame transmission task" is not defined in Claim 1. Further, the phrase is not used in the written description. Moreover, the phrase has no plain meaning. With respect to transmission of data, the general word "transmission" does have a plain meaning, namely, sending data from one place to another. However, for at least three reasons, the general meaning is not useful in making a determination of the meaning of "executing a frame transmission task."

First, by definition, any "transmission" is a self-contained act, namely, "an act of transmitting." Thus, by their use of the word "executing," the inventors must have meant something that required execution. Second, Claim 1 states that "executing a frame transmission task" is "to initiate transmission of the frame from the buffer memory." In general, to "initiate" a transmission means to cause that transmission to begin. Thus, if the "transmission task" causes transmission to begin, the task is not the transmission, and the task itself must be completed or at least started before the transmission is begun. Third, the dependent claims make clear that "transmission task" is something specific, albeit undefined. For example, dependent Claim 2 claims:

WEBSTER'S NEW COLLEGIATE DICTIONARY 1241 (1975).

The method of claim 1, wherein the frame transmission task includes executing a carrier sense, multiple access protocol.

Further, dependent Claim 5 provides:

The method as in Claim 1, wherein the frame transmission task includes: appending an error detection code to the frame of data to be transmitted to the network.

The Court notes that Claim 5 uses the wording "The method as in Claim 1," instead of the more common "The method in Claim 1."

The phrase was added to Claim 1 during its prosecution. However, there was no discussion of it during the prosecution. The step is an essential limitation of Claim 1. Insofar as the patent claims an essential step that has no plain meaning, and that is not defined or referred to elsewhere in the specification, Claim 1 is arguably indefinite. However, for the Court to determine that Claim 1 is indefinite, it would have to consider whether one skilled in the art would understand the bounds of the Claim when read in light of the specification. See Miles Labs., Inc. v. Shandon Inc., 997 F.2d 870, 875 (Fed. Cir. 1993). Further, the Court does not reach the issue of whether Claim 1 is rendered invalid for lack of a written description.

Accordingly, the parties shall address this issue in supplemental briefing to be submitted as part of a further Case Management Conference set at the conclusion of this Order. D. The '872 Patent

The Court's conclusion applies to all other Claims of the '094 Patent that include the phrase "executing a frame transmission task." However, the Court does not reach the issue of the ambiguity of this phrase in other claims of the '094 Patent because those claims were not tendered to the Court for construction.

The '872 Patent is entitled "Apparatus for automatic initiation of data transmission." The Abstract of the '872 Patent describes the invention as follows:

Early initiation of transmission of data in a network interface that includes a dedicated transmit buffer is provided in a system which includes logic for transferring frames of data composed by the host computer into the transmit buffer. The amount of data of a frame which is downloaded by the host to the transmit buffer is monitored to make a threshold determination of an amount of data of the frame
resident in the transmit data buffer. The network interface controller includes logic for initiating transmission of the frame when the threshold determination indicates that a sufficient portion of the frame is resident in the transmit buffer, and prior to transfer of all of the data of the frame into the transmit buffer. The monitoring logic includes a threshold store, which is programmable by the host computer for storing a threshold value. Thus, the threshold value may be set by the host system to optimize performance in a given setting.

1. Claim 1

Claim 1 of the '872 Patent provides:

For a system transmitting frames of data across a communications medium; an apparatus comprising:
buffer memory for storing data of frames composed by the host computer for transmission on the communications medium;
means, having a host system interface, for transferring data of frames to the buffer memory;
means, coupled with the buffer memory, for monitoring the transferring of data of a frame to the buffer memory to make a threshold determination of an amount of data of the frame transferred to the buffer memory;
means, responsive to the threshold determination of the means for monitoring, for initiating transmission of the frame prior to transfer of all the data of the frame to the buffer memory from the host computer;
transmit logic, responsive to the means for initiating transmission, for retrieving data from the buffer memory and supplying retrieved data for transmission on the communications medium; and
underrun control logic, which detects a condition in which the means for transferring falls behind the transmit logic, and supplies a bad frame signal to the communications medium in response to the underrun condition.

a. "buffer memory for storing data of frames composed by the host

computer for transmission on the communications medium"

The parties agree that "buffer memory" means "a memory for temporary storage of data." However, Plaintiff requests the Court to add the limitation "wherein the buffer memory is able to retain a frame of data that has been transmitted" to the disputed phrases. Because the additional language would add a limitation that is not required by the specification, the Court declines Plaintiff's request.

(See Plaintiff's Reply Claim Construction Brief at 15, Docket Item No. 565.)

b. "means . . . for monitoring the transferring of data of a frame to the buffer memory"

Claim 1 of the '872 Patent discloses an apparatus comprising: "means, coupled with the buffer memory, for monitoring the transferring of data of a frame to the buffer memory to make a threshold determination of an amount of data of the frame transferred to the buffer memory." The parties agree that the "means . . . for monitoring" limitation should be construed under § 112 ¶ 6. However, the parties dispute whether the function performed by the claimed means includes the phrase "to make a threshold determination of an amount of data of the frame transferred to the buffer memory."

The "means for initiating transmission" limitation that follows the "means for monitoring" provides: "means, responsive to the threshold determination of the means for monitoring." Thus, the function of making a "threshold determination" by the "means for monitoring" is a necessary antecedent to the "means for initiating transmission." Therefore, the Court finds that the subject language is part of the claimed function.

c. "host computer"

The term "host computer" is also used in Claim 1 of the '872 Patent. Upon review, the Court finds that the inventors use the phrase "host computer" synonymously with the phrase "host system" as it appears in the '313 patent. Accordingly, the Court construes the phrase "host computer" identically with its construal of the phrase "host system" in the context of the '313 patent.

2. Claim 21

Claim 21 of the '872 Patent claims:

A network interface adapter for a carrier sense, multiple access network with collision detection (CSMA/CD), comprising:
buffer memory which stores data of frames composed by a host computer for transmission on the network;
data transfer circuitry, having a host system interface, for transferring data of frames to the buffer memory;
logic, coupled to the buffer memory, which monitors the transferring of data of a frame to the buffer memory to make a threshold determination of an amount of data of the frame transferred to the buffer memory;
a medium access controller for the CSMA/CD network coupled to the buffer memory for managing transmission of frames of data from the buffer memory to the network; and
logic, responsive to the threshold determination of the logic which monitors the transferring of data to the buffer memory, which initiates transmission of the frame from the buffer memory to the medium access controller prior to transfer of all of the data of the frame to the buffer memory, including logic which initiates transmission of the frame when no complete frame of data is present in the buffer memory.

As with Claim 1, the parties agree that "buffer memory" means "a memory for temporary storage of data." However, Plaintiff requests the Court to add the limitation "wherein the buffer memory is able to retain a frame of data that has been transmitted" to the disputed phrases. For the same reasons stated above, the Court declines Plaintiff's request.

(See Plaintiff's Reply Claim Construction Brief at 15, Docket Item No. 565.)
--------

Further, the parties dispute whether the "logic . . . which monitors" in Claim 21 should be construed under § 112 ¶ 6. However, the Court declines to consider this matter pending a response by the parties to the matters discussed above.

IV. CONCLUSION

The Court has construed the disputed phrases as tendered by the parties. Consistent with the terms of this Order, on or before February 21, 2012, the parties shall meet and confer and file supplemental briefs as directed. These briefs shall be filed simultaneously. On or before February 24, 2012, the parties shall deliver two Chambers' copies of the supplemental briefs in three ring binders.

The Court sets March 12, 2012 at 11 a.m. for a Further Case Management Conference. On or before March 2, 2012, the parties shall file a Joint Case Management Statement. The Statement shall include, among other things, how this case should proceed in light of this Order.

____________

JAMES WARE

United States District Chief Judge

THIS IS TO CERTIFY THAT COPIES OF THIS ORDER HAVE BEEN DELIVERED TO:

Andy Tindel atindel@andytindel.com

Anthony H. Son ason@wileyrein.com

Ashlea Pflug araymond@winston.com

Barry Kenneth Shelton shelton@fr.com

Benjamin Charles Elacqua elacqua@fr.com

Brian Christopher Claassen Brian.Claassen@kmob.com

Bruce A Smith bsmith@jwfirm.com

Charlene Marie Morrow cmorrow@fenwick.com

Charles Ainsworth charley@pbatyler.com

Christopher Frederick Jeu cjeu@mofo.com

Christopher Needham Cravey ccravey@wmalaw.com

Christopher Ronald Noyes christopher.noyes@wilmerhale.com

Craig Steven Summers 2css@kmob.com

Danny Lloyd Williams dwilliams@wmalaw.com

Darryl Michael Woo dwoo@fenwick.com

David J Healey healey@fr.com

David J. Healey Healey@fr.com

David Lee Gann dgann@rgrdlaw.com

David T McDonald david.mcdonald@klgates.com

David T Pollock dpollock@reedsmith.com

Deron R Dacus ddacus@rameyflock.com

Dominic E. Massa dominic.massa@wilmerhale.com

Douglas R. Young dyoung@fbm.com

E Joseph Benz jbenz@csgrr.com

Eric Louis Toscano etoscano@reedsmith.com

Garland T. Stephens stephens@fr.com

Harold H Davis harold.davis@klgates.com

Hector J. Ribera hribera@fenwick.com

Hiep Huu Nguyen hnguyen@winston.com

Hsiang H. Lin jlin@ftbklaw.com

Irfan A Lateef 2ial@kmob.com

Irfan Ahmed Lateef ial@kmob.com

Jack Wesley Hill fedserv@icklaw.com

Jack Wesley Hill fedserv@icklaw.com

James Patrick Brogan jbrogan@cooley.com

Jason S Jackson jjackson@rgrdlaw.com

Jeffrey Fuming Yee yeej@gtlaw.com

Jeffrey K. Joyner joynerj@gtlaw.com

Jennifer Parker Ainsworth jainsworth@wilsonlawfirm.com

Jessica M. Kattula jkattula@rgrdlaw.com

John Christopher Herman jherman@rgrdlaw.com

John K. Grant johnkg@rgrdlaw.com

John Philip Brinkmann brinkmann@fr.com

John W Thornburgh thornburgh@fr.com

Jonah D Mitchell jmitchell@reedsmith.com

Jonah Dylan Mitchell jmitchell@reedsmith.com

Jordan Jaffe jordanjaffe@quinnemanuel.com

Karl J Kramer kkramer@mofo.com

Kevin P.B. Johnson kevinjohnson@quinnemanuel.com

Kimball R Anderson kanderson@winston.com

Kyle D Chen kyle.chen@cooley.com

Kyung Kim dkim@wmalaw.com

Lam Khanh Nguyen lnguyen@cooley.com

Laura Katherine Carter lcarter@winston.com

Lillian J Pan lpan@orrick.com

Lionel Marks Lavenue Lionel.Lavenue@finnegan.com

Mahmoud Munes Tomeh 2mmt@kmob.com

Mark Daniel Selwyn mark.selwyn@wilmerhale.com

Marko R Zoretic 2mrz@kmob.com

Matthew Clay Harris mch@emafirm.com

Matthew J. Brigham mbrigham@cooley.com

Michael J Newton mike.newton@alston.com

Michael J. Bettinger mike.bettinger@klgates.com

Michael L Brody Mbrody@winston.com

Nicholas James Nugent nicholas.nugent@finnegan.com

Patricia Kane Schmidt patricia.schmidt@klgates.com

Peter M Jones pjones@rgrdlaw.com

Ray R. Zado rayzado@quinnemanuel.com

Richard T Ting rting@reedsmith.com

Robert Christopher Bunt rcbunt@pbatyler.com

Robert M Parker rmparker@pbatyler.com

Roderick Bland Williams rick.williams@klgates.com

Roger Brian Craft bcraft@findlaycraft.com

Ruben Singh Bains rbains@wmalaw.com

Ryan K. Walsh rwalsh@rgrdlaw.com

Scott D. Baker sbaker@reedsmith.com

Scott Richard Mosko scott.mosko@finnegan.com

Sean Sang-Chul Pak seanpak@quinnemanuel.com

Seth M Sproul sproul@fr.com

Seth McCarthy Sproul sproul@fr.com

Steven S. Baik sbaik@ftbklaw.com

Thomas J. Friel tfriel@cooley.com

Thomas John Ward jw@jwfirm.com

Thomas John Ward jw@jwfirm.com

Timothy Paar Walker timothy.walker@klgates.com

Todd Richard Gregorian tgregorian@fenwick.com

William F. Lee william.lee@wilmerhale.com

Richard W. Wieking, Clerk

By: JW Chambers

Susan Imbriani

Courtroom Deputy


Summaries of

United States Ethernet Innovations, LLC v. Acer, Inc.

UNITED STATES DISTRICT COURT FOR THE NORTHERN DISTRICT OF CALIFORNIA SAN FRANCISCO DIVISION
Jan 31, 2012
NO. C 10-03724 JW (N.D. Cal. Jan. 31, 2012)
Case details for

United States Ethernet Innovations, LLC v. Acer, Inc.

Case Details

Full title:U.S. Ethernet Innovations, LLC, Plaintiff, v. Acer, Inc., et al., AT&T…

Court:UNITED STATES DISTRICT COURT FOR THE NORTHERN DISTRICT OF CALIFORNIA SAN FRANCISCO DIVISION

Date published: Jan 31, 2012

Citations

NO. C 10-03724 JW (N.D. Cal. Jan. 31, 2012)