Opinion
Patent Appeal No. 8619.
April 20, 1972.
James W. Falk, Murray Hill, N. J., Howard R. Popper, Berkeley Heights, N. J., attys. of record, for appellant.
S. Wm. Cochran, Washington, D.C., for the Commissioner of Patents. Jere W. Sears, Washington, D.C., of counsel.
Appeal from the Board of Appeals of United States Patent Office.
Before RICH, ALMOND, BALDWIN, and LANE, Judges, and RAO, Judge, United States Customs Court, sitting by designation.
This appeal is from the decision of the Patent Office Board of Appeals, affirming a rejection of claims 1-15 in appellant's application. No claims have been allowed.
Application Serial No. 492,000, filed October 1, 1965.
THE INVENTION
The invention relates to a method of analyzing data words to determine the number of 1's they contain. The specification states that there are numerous needs for such analyses in computer-controlled systems, a traffic study on telephone lines being given as exemplary. Apparently methods of analyzing data words have been known, but appellant asserts that his method requires fewer operations and therefore takes less time.
The data words discussed in appellant's specification are in machine language and contain only 0's and 1's. The digits of such words are called "bits."
The process is carried out by taking particular advantage of two features allegedly available in at least certain prior art computers: a capability of handling what we shall call an EXAMINE instruction, and an address memory device referred to by appellant as a J-register.
A computer program is in essence a series of instructions for the computer to follow. Typical instructions might be to add a certain number to the data being worked on, or multiply the data by a number, or compare the data to another number to see which is larger, etc. When a program is fed into a computer, each instruction is stored in an addressed part of its memory circuitry. When the data to be worked on is fed into the computer, it is treated in accordance with those stored instructions. Normally, the instructions are performed in the sequence of their addresses in the computer's memory. However, some instructions may require that the sequence not be adhered to and that the data should be treated in accordance with an instruction other than the next one in line.
The EXAMINE instruction causes the computer to perform several operations. First it examines the data word being analyzed and determines whether all the bits are 0's. If the bits are all 0's, the computer is instructed to jump to the address of that set of instructions which governs certain final calculation steps in appellant's process. If the word contains one or more 1's, the EXAMINE instruction requires the computer to change the least significant 1 (the 1 appearing farthest to the right in the data word) to a 0. The computer then goes on to the instruction at the next consecutive address.
The J-register is a device which is used when there is a jump out of the regular order of instructions. Whenever an instruction requires the computer to go to an instruction address other than that of the next consecutive instruction, the address of the next consecutive instruction is recorded in the J-register. For example, assume that there is an EXAMINE instruction located at address number 100 in a computer, and that the address of the instruction governing the final calculations is address number 500. If the data word being analyzed is "0000" when the computer arrives at the EXAMINE instruction, the word will be analyzed, it will be determined that the word contains no 1's, and the computer will therefore be required to jump to the instruction at address number 500. Normally the computer would have followed the instructions in sequential order, i. e., it would have followed the instruction at address number 100, then followed the instruction at address number 101, etc. Since there has been a jump out of the sequential order, the address of the next consecutive instruction, address number 101 is stored in the J-register. In other words, whenever there is a jump, the J-register records the address the machine would have gone to next if there hadn't been a jump.
These then are the special tools appellant uses to simplify the determination of the number of 1's in a data word. Both the EXAMINE instruction and the J-register are alleged by appellant to have been previously known for other uses, the specification specifically referring to a copending application which discloses a computer purportedly containing these options.
The way appellant analyzes data words is by placing a number of EXAMINE instructions in consecutive addresses in a computer which has the J-register. As a data word goes through the sequence of EXAMINE instructions, it loses its rightmost 1 as each instruction is carried out. Eventually the last 1 in the data word will be cancelled out. The next EXAMINE instruction will detect all 0's in the word and will therefore cause the computer to jump to the instructions governing the final calculations. Since a jump is made, the address of the next consecutive instruction is placed in the J-register. The address of the last EXAMINE instruction used, minus the address of the first EXAMINE instruction in the sequence, gives the number of 1's which were contained in the data word.
As an example, the analysis of the data word "1010" could go as follows: Since the data word has only four digits, only four EXAMINE instructions will be necessary. These instructions must be placed in consecutive addresses in the computer's memory, for example, at address numbers 100, 101, 102 and 103. When our data word is analyzed by the EXAMINE instruction at address number 100, it will be determined that not all of the bits are 0's. The rightmost 1 will be changed to a 0, changing our word to "1000," and the computer will go on to the instruction at address number 101. In following the EXAMINE instruction at address number 101, the computer will again find that not all of the bits in the word are 0's, so the computer will change the rightmost 1 to a 0, making our word now "0000," and go on to the instruction at address number 102. In following the EXAMINE instruction at address number 102, the computer will find that all of the bits in our word are now 0's. The address of the next consecutive instruction, 103, will therefore be placed in the J-register and the computer will jump to the instruction governing the final calculating steps. These final calculating steps constitute merely the manipulation of the number stored in the J-register and the address of the first EXAMINE instruction in the sequence. Since the address stored in the J-register (here 103) minus 1 always gives the point in the sequence where it was determined that all of the 1's had been changed to 0's (here 102), that number minus the address of the first EXAMINE instruction in the sequence (100) will always give the number of 1's originally contained in the data word (2).
The above explanation of appellant's process is at best vastly oversimplified, but it is enough to show the type of process we are dealing with, and that is all the background necessary here.
Claim 1 is sufficiently representative:
1. A method for controlling the operation of a data processor to determine the number of 1's in a data word; said data processor including a memory for storing data and instruction words at respective addresses; means for normally controlling the sequential execution of successively addressed instruction words; a plurality of registers; means for storing memory data words in said registers; means for performing logical operations on data words in said registers; and means responsive to the execution of a predetermined instruction word for examining the data word contained in a predetermined first one of said registers, changing the rightmost 1 in said first register to a 0 if said register contains at least one 1, controlling a transfer to the instruction word at a specified address if said first register contains all 0's, and storing in a predetermined second one of said registers the address of the following instruction word if said transfer is made; comprising the steps of:
(1) controlling said storing means to store a memory data word whose number of 1's must be counted in said first register,
(2) controlling the data processor to execute a series of identical ones of said predetermined instruction word, and
(3) comparing the address of the first of the instruction words in said series with the content of said second register when a transfer is made during the execution of one of the instruction words in said series to derive the number of 1's in said data word.
The other claims vary in breadth, claims 14 and 15 differing additionally in that their preambles define the claimed process as a new use of certain apparatus.
THE REJECTION
The board stated that the rejection of the claims was "under 35 U.S.C. § 100, 101 as for a process not embraced by the patent statutes in that the sole reliance for patentability thereof is the mental act of programming a mathematical solution to a mathematical algorithm." From this statement, the board branched out into what appear to us to be several theories of rejection.
§ 100. Definitions
When used in this title unless the context otherwise indicates —
We note that the board's opinion was mailed nine days after our first opinion was handed down in In re Prater, 415 F.2d 1378, 56 CCPA 1360 (1968), on rehearing, 415 F.2d 1393, 56 CCPA 1381 (1969). The board's decision on petition for reconsideration discussed below was rendered prior to our decision on rehearing in Prater.
The first theory could be called a quasi-prior-art rejection. The board, after briefly explaining the invention, stated:
* * * [T]he prior art computer at the time of its manufacture was built with the capability, as one of its optional procedures, of carrying out the electronic analog of the mathematical operation of scanning each of the digits of a binary number from right to left while noting the location of each binary one and remembering the point in the scan where the last binary one was found.
Appellant's process we find is not a different process from that already built into the prior art computer through successive invocation of the * * * [EXAMINE] instruction. The computer inherently by its construction must cause the second register to assume a physical state that by one convention of meaning could be interpreted as the reentry point for a new series of consecutive numbers.
The board concluded:
* * * Hence, appellant's process, as claimed, is not one that could be categorized as a new use of old apparatus, but rather is the same use implicit in the old apparatus with the sole variation being the interpretation which the mind will accord the numerical data represented by the computer.
Since the board's second theory of rejection apparently deals with the language of the claims, it might be called a quasi-indefiniteness rejection:
Heretofore, we have considered the claims as if they were properly drawn to the use of specified apparatus. However, the only "apparatus" designated in the claims are a series of functions that otherwise unspecified apparatus is alleged to carry out.
For example, claim 14 specifies the data processing apparatus as including (1) an addressable memory, (2) means for executing instructions, (3) means for transferring to an instruction, and (4) means for comparing data. None of these affords a machine basis for the claiming of a new use of an old machine, as must be an implicit requirement of 35 U.S.C. § 100(b).
Each of these claimed items is a function which is wholly independent of any identifiable machine or computing apparatus. The "memory" called for by claim 14 tells nothing of the apparatus involved and notoriously could be any series of photographic, magnetic or physical discontinuities in any object and could just as well be a faculty of the human mind. The various "means" statements of claim 14 include every possible way of carrying out the stated functions and likewise would be inclusive of the normal mental faculties of a person. It must be implicit in the statute that to qualify a process as a new use of old apparatus, the old apparatus must be identifiable as structure not merely as function or result wholly divorced from apparatus that could carry out the function or result.
A third theory of rejection is apparently based on alleged inadequate disclosure:
Appellant's specification likewise is of no help in identifying the apparatus which appellant contemplated to use to carry out the claimed process. The drawing is a series of labeled rectangles interconnected by lines while the description thereof is in terms of the mathematical algorithm to be carried out, with no indication of the computer structure for carrying out the operations. The program instructions of the specification apparently would pertain to some particular apparatus but the parts of that apparatus which are to be used in the claimed process are not thereby identified. We note that reference is made on page 2 of the specification to the Doblmaier et al. application, Serial No. 334,875, but this reference is only to the "order structure" of a telephone system of that application and does not point to or rely on any particular structure thereof which could be a disclosure basis for the various "means" statements of the claims. Since the application referred to contains 660 pages of description and 132 sheets of drawing, the very general reference thereto in appellant's specification to an "order structure" is insufficient to identify the old apparatus of which the instant claims are asserted to define a new and patentable use. * * *
Appellant, by failing to disclose any structural basis for the function generating units of claim 14, such as the "means" statements thereof, that are required to be disclosed specifically by 35 U.S.C. § 112, third paragraph, has barred effectively all ways to identify what may be the apparatus appellant employs, as well as the legal equivalents thereof. Not withstanding [sic] this failure of the instant disclosure, appellant here asserts inconsistently that he is entitled to the claimed process as a new use of a known machine under 35 U.S.C. § 100(b).
Compare In re Ghiron, 442 F.2d 985, 58 CCPA 1207 (1971), but note that in Ghiron the claims were rejected on the basis of 35 U.S.C. § 112.
Finally the board advanced a "mental steps" rejection, i. e., that since the apparatus limitations in the claims were merely functional, the claims embrace "that which could be only an act of the mind rather than calling for an act on a physical thing * * *." The board specifically adopted the reasoning of the examiner which was to the same effect.
In a request for reconsideration, appellant contends that the board's first theory of rejection amounted to a new rejection based on either section 102 or 103 of the statute, and requested that the statutory basis for the rejection be stated. Appellant further contended that the second and third theories of rejection amounted to a new rejection based on 35 U.S.C. § 112, and asked that it be denominated as such. Appellant also submitted two affidavits for the purpose of showing that the disclosure of the case as filed satisfied 35 U.S.C. § 112.
For reasons which will become apparent, we find it unnecessary to deal with these affidavits.
The board replied by effectively disclaiming any reliance on 35 U.S.C. § 103 or 112 in their original opinion:
* * * It is axiomatic that invoking * * * [the new use provision of 35 U.S.C. § 100(b)] requires both a disclosure or identification of the known apparatus necessary to practice the invention as well as a disclosure of how the new use differs from the known use thereof. Our decision merely pointed out the absence of any adequate basis for appellant's placing his invention under section 100(b) on both counts. * * * If appellant's identification of the known apparatus is sufficient this Board must be free to comment on the identity of the uses of that apparatus with the instant use but if the identification of the apparatus in the specification is so faulty that it is beyond our consideration then the allegation that the instant invention comes under 35 U.S.C. § 100(b) must fail for an additional reason.
OPINION
Initially, we find no basis in either section 100 or section 101 of the statute for any of the first three theories of rejection advanced by the Patent Office. The purpose of section 101 is to define the categories of subject matter for which patents can be obtained, "subject to the conditions and requirements of this title." The language pertaining to the new use of known processes, machines, etc. was not placed in section 100(b) to impose special standards for inventions pertaining to such uses, but rather to dispel all doubt that these inventions are patentable and to place them under the "process" category of 35 U.S.C. § 101. The word "new" as used in both section 100(b) and section 101 is defined in section 102 of the statute which sets forth the conditions for novelty. The use of the term "new" does not add any special novelty requirement to that already found in those conditions. See In re Bergstrom, 427 F.2d 1394, 57 CCPA 1240 (1970).
35 U.S.C. § 101 (1970). See, e. g., H.R. Rep. No. 1923, 82d Cong., 2d Sess. at 6, 16-17 (1952); Hearings on H.R. 3760 Before Subcomm. No. 3 of the House Comm. on the Judiciary, 82d Cong., 1st Sess., ser. 9, at 37 (1951) [hereinafter cited as 1951 Hearings]. The "conditions" referred to in section 101 are spelled out in chapter 10 of the statute, which includes section 102, entitled "Conditions for patentability; novelty and loss of right to patent" and section 103, entitled "Conditions for patentability; nonobvious subject matter." The "requirements" referred to in section 101 include such other obligations imposed upon inventors as are found elsewhere in the statute, most notably in section 112. See 35 U.S.C. § 282.
See, e. g., H.R. Rep. No. 1923, 82nd Cong., 2d Sess. 17 (1952); 1951 Hearings at 37, 44, 54, 94.
Similarly, sections 100 and 101 do not speak of claims or claim language, or state any requirements as to the disclosure of the old process, machine, etc. in the specification of a patent application. These matters are also dealt with elsewhere in the statute, most notably in section 112. There is thus nothing in sections 100 or 101 of the statute which supports the board's first three theories of rejection.
Certain statements in the solicitor's brief could be construed as a suggestion that this case be treated as having been under a section 112 rejection. This would be a most inappropriate case in which to do so, for two reasons. In the first place, appellant specifically requested the board to tell him whether it had entered a rejection under that section, and the decision on reconsideration clearly disclaims that any such rejection was made. Further, the application referred to by reference in appellant's specification and upon which he would rely for a showing of his "old apparatus" is not in the record before this court. For all we know, appellant may have though it unnecessary to place it in the record because the rejection he faced was based only on sections 100 and 101.
With regard to the "mental steps" rejection, whether appellant's process is a "statutory" invention depends on whether it is within the "technological arts." The phrase "technological arts," as we have used it, is synonymous with the phrase "useful arts" as it appears in Article I, Section 8 of the Constitution. See In re Benson, 441 F.2d 682, 58 CCPA 1134 (1971), cert. granted sub nom. Gottschalk v. Benson, 405 U.S. 915, 92 S.Ct. 934, 30 L.Ed.2d 784 (1972) (No. 71-485); In re Musgrave, 431 F.2d 882, 57 CCPA 1352 (1970). It is clear that appellant's process, which is useful in the internal operation of computer systems, is within the "useful arts." In re Benson, supra. Appellant's process is therefore a statutory process within the meaning of 35 U.S.C. § 101.
The decision of the board is reversed.
Reversed.
* * * * *
(b) The term "process" means process, art or method, and includes a new use of a known process, machine, manufacture, composition of matter, or material.
* * * * *
§ 101. Inventions Patentable
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
The penultimate paragraph of the opinion for the court, in applying the test for determining whether the claimed process is "statutory" under 35 U.S.C. § 101, which test is stated to be whether the process is within the "technological arts," says:
The phrase "technological arts," as we have used it, is synonymous with the phrase "useful arts" as it appears in Article I, Section 8 of the Constitution.
As the originator of that "test" in In re Musgrave, 431 F.2d 882, 893, 57 CCPA 1352, 1367 (1970), I hereby express my agreement with the above-quoted statement. The phrase "useful arts" which was written into the Constitution conjures up images of the Franklin stove, horse collars, and buggy whips. The term "technological arts" was selected in Musgrave as probably having a connotation in these times roughly equivalent to that which "useful arts" had in the eighteenth century. No new legal concept was intended. In fact, in Musgrave it was coupled with reference to the "useful arts" provision in the Constitution. Again in In re Benson, 441 F.2d 682, 688, 58 CCPA 1134, 1144 (1971), when the same test was applied, the question asked was whether the process was not "in the technological or useful arts." Now we have come full circle in pointing out that the intention all along has been to convey the same idea and to occupy whatever ground the Constitution permits with respect to the categories of patentable subject matter named in section 101.